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Mixed-Signal Design

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  • Discussion

    Correct way to model noise in a VCO in verilog-A

    Category: Mixed-Signal Design

    By ddkdd

    •

    updated over 5 years ago by FormerMember

    5 replies • 22232 views
  • Discussion

    Referance and fractional spur modeling of PLL in verilog ams

    Category: Mixed-Signal Design

    By ddkdd

    •

    updated over 5 years ago by Andrew Beckett

    1 replies • 13856 views
  • Discussion

    Verilog AMS extracton issue

    Category: Mixed-Signal Design

    By ddkdd

    •

    updated over 5 years ago by ddkdd

    10 replies • 18575 views
  • Discussion

    Transfer Layout from Innovus to Virtuoso: Layout pins issue (interoperable between Innovus and Virtuoso using OpenAccess)

    Category: Mixed-Signal Design

    By ayande1370

    •

    started over 5 years ago

    0 replies • 13017 views
  • Discussion

    straight line (best) fit using viva calculator

    Category: Mixed-Signal Design

    By vamshiky

    •

    updated over 5 years ago by Hannahyrh

    18 replies • 36625 views
  • Discussion

    Using wave spec for model validation

    Category: Mixed-Signal Design

    By juanbaudino

    •

    updated over 5 years ago by juanbaudino

    3 replies • 14316 views
  • Discussion

    How to Save selected ADHL variable in VarilogA Model

    Category: Mixed-Signal Design

    By AlbertoLopez

    •

    updated over 5 years ago by AlbertoLopez

    2 replies • 16411 views
  • Discussion

    xmsim: *F,RNAERR: The simulator terminated with an analog initialization error.

    Category: Mixed-Signal Design

    By Pedro P

    •

    updated over 5 years ago by Pedro P

    4 replies • 5982 views
  • Discussion

    How to save digital waveforms in monte carlo

    Category: Mixed-Signal Design

    By RogerBR

    •

    updated over 5 years ago by RogerBR

    4 replies • 16671 views
  • Discussion

    use AMS info points for multiple AC operating points

    Category: Mixed-Signal Design

    By Darrell L

    •

    updated over 5 years ago by Darrell L

    2 replies • 13847 views
  • Discussion

    Cadence Virtuoso error - sv_seghandler while using irun

    Category: Mixed-Signal Design

    By Shruthi Suresh

    •

    updated over 5 years ago by Andrew Beckett

    1 replies • 4334 views
  • Discussion

    Obtaining power traces using Cadence Virtuoso

    Category: Mixed-Signal Design

    By birjit

    •

    updated over 5 years ago by Andrew Beckett

    3 replies • 15354 views
  • Discussion

    WPE effect in QRC

    Category: Mixed-Signal Design

    By Ugur

    •

    updated over 5 years ago by Andrew Beckett

    3 replies • 14811 views
  • Discussion

    XMSIM(64) error Unexpected signal #25 (File Size Limit Exceed)

    Category: Mixed-Signal Design

    By PBWU

    •

    updated over 5 years ago by nankeener

    2 replies • 4989 views
  • Discussion

    How to Introduce a CDL Netlist for and Instance in AMS Simulation

    Category: Mixed-Signal Design

    By baltacican87

    •

    started over 5 years ago

    0 replies • 15547 views
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