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Mixed-Signal Design

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  • Discussion

    Verilog-A module instantiating

    Category: Mixed-Signal Design

    By Jacob Bao

    •

    updated over 5 years ago by Andrew Beckett

    5 replies • 26702 views
  • Discussion

    Does xrun support connection module between nettype and logic?

    Category: Mixed-Signal Design

    By RZAQA

    •

    updated over 5 years ago by Andrew Beckett

    1 replies • 2435 views
  • Discussion

    In Cadence simulation how to introduce noise in current source

    Category: Mixed-Signal Design

    By nisgup

    •

    updated over 5 years ago by Andrew Beckett

    9 replies • 24023 views
  • Discussion

    Virtuoso: cloning vs unit cell

    Category: Mixed-Signal Design

    By AshutoshLayout

    •

    updated over 5 years ago by Andrew Beckett

    1 replies • 13254 views
  • Discussion

    Problem with ahdlcmi module library

    Category: Mixed-Signal Design

    By ID90

    •

    updated over 5 years ago by ID90

    4 replies • 14557 views
  • Discussion

    File directory if using GUI

    Category: Mixed-Signal Design

    By Hazem Al Indari

    •

    updated over 5 years ago by Hazem Al Indari

    3 replies • 14070 views
  • Discussion

    Hierarchical calling of VerilogA models

    Category: Mixed-Signal Design

    By Kulmani

    •

    updated over 5 years ago by Kulmani

    4 replies • 15047 views
  • Discussion

    Missing connectLib

    Category: Mixed-Signal Design

    By p786

    •

    updated over 5 years ago by Andrew Beckett

    7 replies • 25144 views
  • Discussion

    getData "noise" not listed in calculator

    Category: Mixed-Signal Design

    By chrisindallastx

    •

    updated over 5 years ago by chrisindallastx

    2 replies • 3794 views
  • Discussion

    Error in RCX in Assura

    Category: Mixed-Signal Design

    By Jayanta

    •

    updated over 5 years ago by Jayanta

    6 replies • 16015 views
  • Discussion

    Convergence Issues causing simulation to Slowdown while using VerilogA models for a PLL-VCO Loop

    Category: Mixed-Signal Design

    By Kulmani

    •

    updated over 5 years ago by FormerMember

    3 replies • 15241 views
  • Discussion

    Sensitivity analysis in ADE XL

    Category: Mixed-Signal Design

    By Jayanta

    •

    updated over 5 years ago by Andrew Beckett

    1 replies • 16320 views
  • Discussion

    Getting a High Frequency toggling at PFD output

    Category: Mixed-Signal Design

    By Kulmani

    •

    updated over 5 years ago by FormerMember

    5 replies • 15339 views
  • Discussion

    How to Model a Low Pass Filter using VerilogA ?

    Category: Mixed-Signal Design

    By Kulmani

    •

    updated over 5 years ago by Kulmani

    4 replies • 26955 views
  • Discussion

    Noise reported

    Category: Mixed-Signal Design

    By greywanderer

    •

    updated over 5 years ago by Andrew Beckett

    9 replies • 17451 views
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