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Mixed-Signal Design

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  • Discussion

    Netlist bus naming convention in ADE XL and VCD files

    Category: Mixed-Signal Design

    By nomart

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    started over 4 years ago

    0 replies • 11699 views
  • Discussion

    Want to assign a variable for a "string parameter" of veriloga block

    Category: Mixed-Signal Design

    By fatcat1206

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    updated over 4 years ago by sergeiGorbikov

    4 replies • 7128 views
  • Discussion

    Different results using AMS simulator vs. Spectre simulator

    Category: Mixed-Signal Design

    By Bjorn VB

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    updated over 4 years ago by FormerMember

    8 replies • 21107 views
  • Discussion

    Problem with understanding the noise integration

    Category: Mixed-Signal Design

    By Phong Phan

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    updated over 4 years ago by Phong Phan

    2 replies • 14250 views
  • Discussion

    question on dyn_mosv check

    Category: Mixed-Signal Design

    By RZAQA

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    started over 4 years ago

    0 replies • 10613 views
  • Discussion

    PSS failure for a ring VCO

    Category: Mixed-Signal Design

    By subhadeepdatta

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    updated over 4 years ago by FormerMember

    4 replies • 14701 views
  • Discussion

    Spice to Spectre conversion

    Category: Mixed-Signal Design

    By sram17

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    updated over 4 years ago by sram17

    17 replies • 21410 views
  • Discussion

    Running Monte carlo simulations in Process corners(SS,FF..)

    Category: Mixed-Signal Design

    By Jayanta

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    started over 4 years ago

    0 replies • 1843 views
  • Discussion

    Set initial value for inputs/outputs for verilog cells in mixed-signal simulation (XCELIUM UNL)

    Category: Mixed-Signal Design

    By patschouly

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    updated over 4 years ago by patschouly

    1 replies • 4589 views
  • Discussion

    Verilog-A module instantiating

    Category: Mixed-Signal Design

    By Jacob Bao

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    updated over 4 years ago by Andrew Beckett

    5 replies • 24204 views
  • Discussion

    Does xrun support connection module between nettype and logic?

    Category: Mixed-Signal Design

    By RZAQA

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    updated over 4 years ago by Andrew Beckett

    1 replies • 2180 views
  • Discussion

    In Cadence simulation how to introduce noise in current source

    Category: Mixed-Signal Design

    By nisgup

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    updated over 4 years ago by Andrew Beckett

    9 replies • 21537 views
  • Discussion

    Virtuoso: cloning vs unit cell

    Category: Mixed-Signal Design

    By AshutoshLayout

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    updated over 4 years ago by Andrew Beckett

    1 replies • 12482 views
  • Discussion

    Problem with ahdlcmi module library

    Category: Mixed-Signal Design

    By ID90

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    updated over 4 years ago by ID90

    4 replies • 13469 views
  • Discussion

    File directory if using GUI

    Category: Mixed-Signal Design

    By Hazem Al Indari

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    updated over 4 years ago by Hazem Al Indari

    3 replies • 13005 views
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