Mixed-Signal Design

Latest Posts

Discussion

ModGen and Common Centroid Layout

Category: Mixed-Signal Design

By growingmind

$usertype
•
updated over 7 years ago by Dimitra Papazoglou

1 replies • 18866 views
Discussion

Getting Started with Verilog-A, Verilog-AMS SImulation in Cadence

Category: Mixed-Signal Design

By growingmind

$usertype
•
updated over 7 years ago by Andrew Beckett

3 replies • 36542 views
Discussion

Difference between bmslib and ahdlib in Cadence

Category: Mixed-Signal Design

By growingmind

$usertype
•
updated over 7 years ago by Andrew Beckett

1 replies • 19001 views
Discussion

best resources and RAKs on Verilog A, Verilog AMS and AMS designer, ADE assembler test/verification and SimVision

Category: Mixed-Signal Design

By mhkvy4

$usertype
•
updated over 7 years ago by Andrew Beckett

3 replies • 2689 views
Discussion

how to measure corner frquency in verilogA

Category: Mixed-Signal Design

By vamshiky

$usertype
•
updated over 7 years ago by Andrew Beckett

5 replies • 15839 views
Discussion

question on acmatch sim in spectre

Category: Mixed-Signal Design

By vamshiky

$usertype
•
updated over 7 years ago by vamshiky

2 replies • 14990 views
Discussion

unable to simulate this veriloga code in cadence

Category: Mixed-Signal Design

By noob1

$usertype
•
updated over 7 years ago by noob1

2 replies • 15325 views
Discussion

eye diagram problem

Category: Mixed-Signal Design

By ManuelSuarez

$usertype
•
updated over 7 years ago by ManuelSuarez

2 replies • 16938 views
Discussion

Automate creation of pins in a top level layout directly above sub-cell pins

Category: Mixed-Signal Design

By JWHoll

$usertype
•
updated over 7 years ago by Andrew Beckett

1 replies • 15575 views
Discussion

Statistical Contribution or criticality of each device

Category: Mixed-Signal Design

By Charanraj Mohan

$usertype
•
updated over 7 years ago by Charanraj Mohan

2 replies • 15563 views
Discussion

controlling mismatch & other related queries.

Category: Mixed-Signal Design

By Charanraj Mohan

$usertype
•
updated over 7 years ago by Charanraj Mohan

2 replies • 3130 views
Discussion

VCD FIle Input to ADE-L

Category: Mixed-Signal Design

By abalbason

$usertype
•
updated over 7 years ago by Andrew Beckett

3 replies • 22441 views
Discussion

How to follow a wire in the layout?

Category: Mixed-Signal Design

By MohsenShah

$usertype
•
updated over 7 years ago by MohsenShah

2 replies • 15523 views
Discussion

ADEL - spectre , DC analysis writefinal param is ignored

Category: Mixed-Signal Design

By marcelpreda

$usertype
•
updated over 8 years ago by marcelpreda

2 replies • 2387 views
Discussion

Transimpedance Amplifier - Broadband Circuit - Cadence Noise Summary

Category: Mixed-Signal Design

By growingmind

$usertype
•
updated over 8 years ago by Andrew Beckett

1 replies • 2052 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.