• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Mixed-Signal Design
CDNS - double leaderboard script

Mixed-Signal Design

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Latest Posts

  • Create a new Post
  • Discussion

    Not fitting lmax-lmin, wmax-wmin or areamax-areamin range

    Category: Mixed-Signal Design

    By Nicolas Callens

    •

    updated over 8 years ago by Nicolas Callens

    4 replies • 23917 views
  • Discussion

    Liberate_AMS for .lib generation.

    Category: Mixed-Signal Design

    By anandmohan

    •

    updated over 8 years ago by anandmohan

    17 replies • 25897 views
  • Discussion

    spectre solver for veriloga

    Category: Mixed-Signal Design

    By Yuanqi

    •

    updated over 8 years ago by Andrew Beckett

    7 replies • 19181 views
  • Discussion

    irun is not recognizing .scs files

    Category: Mixed-Signal Design

    By 0nTheG0

    •

    updated over 8 years ago by 0nTheG0

    2 replies • 16464 views
  • Discussion

    Verilog-A to access wire bus of DUT

    Category: Mixed-Signal Design

    By slim15

    •

    updated over 8 years ago by Dimitra Papazoglou

    1 replies • 19843 views
  • Discussion

    ModGen and Common Centroid Layout

    Category: Mixed-Signal Design

    By growingmind

    •

    updated over 8 years ago by Dimitra Papazoglou

    1 replies • 19768 views
  • Discussion

    Getting Started with Verilog-A, Verilog-AMS SImulation in Cadence

    Category: Mixed-Signal Design

    By growingmind

    •

    updated over 8 years ago by Andrew Beckett

    3 replies • 38065 views
  • Discussion

    Difference between bmslib and ahdlib in Cadence

    Category: Mixed-Signal Design

    By growingmind

    •

    updated over 8 years ago by Andrew Beckett

    1 replies • 19873 views
  • Discussion

    best resources and RAKs on Verilog A, Verilog AMS and AMS designer, ADE assembler test/verification and SimVision

    Category: Mixed-Signal Design

    By mhkvy4

    •

    updated over 8 years ago by Andrew Beckett

    3 replies • 2939 views
  • Discussion

    how to measure corner frquency in verilogA

    Category: Mixed-Signal Design

    By vamshiky

    •

    updated over 8 years ago by Andrew Beckett

    5 replies • 16593 views
  • Discussion

    question on acmatch sim in spectre

    Category: Mixed-Signal Design

    By vamshiky

    •

    updated over 8 years ago by vamshiky

    2 replies • 15648 views
  • Discussion

    unable to simulate this veriloga code in cadence

    Category: Mixed-Signal Design

    By noob1

    •

    updated over 8 years ago by noob1

    2 replies • 15935 views
  • Discussion

    eye diagram problem

    Category: Mixed-Signal Design

    By ManuelSuarez

    •

    updated over 8 years ago by ManuelSuarez

    2 replies • 17750 views
  • Discussion

    Automate creation of pins in a top level layout directly above sub-cell pins

    Category: Mixed-Signal Design

    By JWHoll

    •

    updated over 8 years ago by Andrew Beckett

    1 replies • 16157 views
  • Discussion

    Statistical Contribution or criticality of each device

    Category: Mixed-Signal Design

    By Charanraj Mohan

    •

    updated over 8 years ago by Charanraj Mohan

    2 replies • 16344 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information