• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

×

Welcome to the Community Recognition Program!

The Community Recognition Program is a way for Cadence to recognize community participation. By sharing your real-world expertise and broadening your knowledge, you will earn points and increase your reputation.

We encourage you to give answers as well as seek answers. You’ll both expand your skill set and help others expand theirs, and that expansion will be visible and valuable to the entire community.

So, join in. Start a conversation. Ask a question. Be the reason that a question gets solved. And last but not least, don’t forget to have fun!

learn More

Cadence Community Forums

Connect with Cadence experts and users around the globe to share ideas and best practices

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Take the Website Tour - Watch Now

CDNS Forum Categories

Browse Cadence Community Forums

Show All

OnCloud Platform

AWR Design Environment

Custom IC Design

Custom IC SKILL

PCB Design & IC Packaging (Allegro X)

System Analysis

OrCAD X

Computational Fluid Dynamics

Functional Verification

Digital Implementation

Mixed-Signal Design

Logic Design

Verification IP

RF Design

High-Level Synthesis

Implementation

PCell Designer

Functional Verification Shared Code

Hardware/Software Co-Development, Verification and Integration

RAVEL DRC Programming for IC Packaging and PCB

Community Super User Program

Want to know more? Check out this section!

Participate Now
CDNS Feature Content

Quick Links

OrCAD X—Freedom to design boldly

Unlock the Future with OrCAD X: PCB Design Simplified

Announcements

News, FAQs, and related info about how to best use the community.

Application Support and Knowledge Portal

Cadence Online Support puts the help you need within easy reach – around the clock, seven days a week

Training

Cadence helps you get the most out of your investment in our technologies through a wide range of education offerings.

Why Join?

  • Ask questions and get answers from Cadence experts
  • Share your expertise and learn from other Cadence users' experiences
  • Participate in technology- and solution-focused discussions
  • Leaderboard

    • 1
      Aurel B
      Aurel B 59 Points
    • 2
      AC20250829806
      AC20250829806 50 Points
    • 2
      SD20251126912
      SD20251126912 50 Points
    • 2
      SM202511279440
      SM202511279440 50 Points
    • 5
      Hoangkhoipcb
      Hoangkhoipcb 35 Points
  • Leaderboard

    • 1
      steve
      steve 17,729 Points
    • 2
      oldmouldy
      oldmouldy 13,640 Points
    • 3
      eDave
      eDave 10,261 Points
    • 4
      ShawnLogan
      ShawnLogan 9,660 Points
    • 5
      skillUser
      skillUser 7,488 Points
CDNS - feedback

Feedback, Suggestions, and Questions

Provide feedback on the forums or any other part of the site. Questions and suggestions welcome.

Latest Posts

  • Suggested Answer

    How to assign package height for all the components on the PCB layout board at a time or quickly

    Category: Allegro X PCB Editor

    By RohitRohan

    •

    updated over 1 year ago by excellon1

    8 replies • 5113 views
  • Discussion

    Test Your Know How : Allegro in Design Analysis

    Category: Allegro X PCB Editor

    By PCBTech

    •

    updated over 1 year ago by PCBTech

    2 replies • 3606 views
  • Discussion

    Renormalizing port impedance in S-Parameter results without re-extraction

    Category: Sigrity

    By SimTech

    •

    started over 1 year ago

    0 replies • 2307 views
  • Not Answered

    Parameters/.param component fails physical DRC, results in error. Cannot convert to PCB

    Category: Allegro X Capture CIS

    By SS202408303624

    •

    updated over 1 year ago by rg13

    1 replies • 2168 views
  • Discussion

    Jitter calculation in Cadence Virtuoso

    Category: Custom IC Design

    By TUKA

    •

    started over 1 year ago

    0 replies • 2788 views
  • Discussion

    Alter statement or alternative in ADE explorer?

    Category: Custom IC Design

    By unSkilled

    •

    updated over 1 year ago by unSkilled

    2 replies • 3413 views
  • Suggested Answer

    How to copy the design entry HDL file from one PC to another PC and open the design in 2nd PC.

    Category: Design Entry HDL

    By RohitRohan

    •

    updated over 1 year ago by jc teyssier

    3 replies • 4740 views
  • Not Answered

    How to set via library in OrCAD Capture CIS

    Category: Allegro X Capture CIS

    By SOT23

    •

    updated over 1 year ago by SOT23

    2 replies • 2091 views
  • Not Answered

    Do you know the capabilities of Power SI Model Extraction workflow ? you can vote for the options below

    Category: Sigrity

    By jillashiva

    •

    updated over 1 year ago by jillashiva

    1 replies • 2741 views
  • Discussion

    Resolving calcVal Parameter Transfer Issue in Cascaded AMS Simulations with Multiple Swept Variables

    Category: Custom IC Design

    By baltaci

    •

    started over 1 year ago

    0 replies • 2847 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information