• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

×

Welcome to the Community Recognition Program!

The Community Recognition Program is a way for Cadence to recognize community participation. By sharing your real-world expertise and broadening your knowledge, you will earn points and increase your reputation.

We encourage you to give answers as well as seek answers. You’ll both expand your skill set and help others expand theirs, and that expansion will be visible and valuable to the entire community.

So, join in. Start a conversation. Ask a question. Be the reason that a question gets solved. And last but not least, don’t forget to have fun!

learn More

Cadence Community Forums

Connect with Cadence experts and users around the globe to share ideas and best practices

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Take the Website Tour - Watch Now

CDNS Forum Categories

Browse Cadence Community Forums

Show All

OnCloud Platform

AWR Design Environment

Custom IC Design

Custom IC SKILL

PCB Design & IC Packaging (Allegro X)

System Analysis

OrCAD X

Computational Fluid Dynamics

Functional Verification

Digital Implementation

Mixed-Signal Design

Logic Design

Verification IP

RF Design

High-Level Synthesis

Implementation

PCell Designer

Functional Verification Shared Code

Hardware/Software Co-Development, Verification and Integration

RAVEL DRC Programming for IC Packaging and PCB

Community Super User Program

Want to know more? Check out this section!

Participate Now
CDNS Feature Content

Quick Links

OrCAD X—Freedom to design boldly

Unlock the Future with OrCAD X: PCB Design Simplified

Announcements

News, FAQs, and related info about how to best use the community.

Cadence Online Support

Cadence Online Support puts the help you need within easy reach – around the clock, seven days a week

Training

Cadence helps you get the most out of your investment in our technologies through a wide range of education offerings.

Why Join?

  • Ask questions and get answers from Cadence experts
  • Share your expertise and learn from other Cadence users' experiences
  • Participate in technology- and solution-focused discussions
  • Leaderboard

    • 1
      DavidJHutchins
      DavidJHutchins 135 Points
    • 2
      oldmouldy
      oldmouldy 90 Points
    • 3
      JCTEYSSIER0
      JCTEYSSIER0 75 Points
    • 4
      bdc66a938f164d
      bdc66a938f164d 67 Points
    • 5
      NJ202509235932
      NJ202509235932 50 Points
  • Leaderboard

    • 1
      steve
      steve 17,599 Points
    • 2
      oldmouldy
      oldmouldy 13,625 Points
    • 3
      eDave
      eDave 10,196 Points
    • 4
      ShawnLogan
      ShawnLogan 9,660 Points
    • 5
      skillUser
      skillUser 7,617 Points
CDNS - feedback

Feedback, Suggestions, and Questions

Provide feedback on the forums or any other part of the site. Questions and suggestions welcome.

Latest Posts

  • Discussion

    Finding of polygons SKILL.

    Category: Custom IC SKILL

    By Serjik

    •

    updated over 8 years ago by Serjik

    9 replies • 10254 views
  • Discussion

    Verilog Netlister compatible net-separator in OA ?

    Category: Custom IC Design

    By Emulator

    •

    updated over 8 years ago by Emulator

    10 replies • 16769 views
  • Discussion

    Footprint pads naming

    Category: PCB Design

    By dtecheng

    •

    updated over 8 years ago by dtecheng

    1 replies • 12930 views
  • Discussion

    Highlighting a group of nets which match a particular regular expression

    Category: Custom IC Design

    By debaabed

    •

    updated over 8 years ago by debaabed

    2 replies • 13286 views
  • Discussion

    Virtuoso Schematic - Enviroment - "move/copy" Snap mode

    Category: Custom IC Design

    By Ionutz

    •

    updated over 8 years ago by Ionutz

    3 replies • 2377 views
  • Discussion

    PGtext in nograph mode

    Category: Custom IC SKILL

    By jaleco

    •

    updated over 8 years ago by jaleco

    6 replies • 15690 views
  • Discussion

    SKILL Scripts - library of scripts

    Category: Allegro X PCB Editor

    By KParks

    •

    updated over 8 years ago by skillUser

    2 replies • 3855 views
  • Discussion

    Cadence virtuoso tool related

    Category: Custom IC Design

    By salamkgp

    •

    updated over 8 years ago by Andrew Beckett

    3 replies • 17274 views
  • Discussion

    how to dump XXX.il from cadence virtuoso CIW

    Category: Custom IC SKILL

    By rockyicer

    •

    updated over 8 years ago by Andrew Beckett

    1 replies • 14350 views
  • Discussion

    DFA Spreadsheet - "Purge classified symbols" button is not active

    Category: PCB Design

    By FormerMember

    •

    started over 8 years ago

    0 replies • 468 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information