• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  • Site
  • Community Search
  • User
Forum - Thread List
  • Discussion

    How to show physical net names in schcref ? Locked

    11241 views
    0 replies
    Started over 4 years ago
    by mikentucson
  • Discussion

    Ground plane: pad does not connect to it

    15385 views
    2 replies
    Latest over 4 years ago
    by Nicolas S
  • Discussion

    OrCAD PCB Designer Standard : Adding a via array

    13728 views
    3 replies
    Latest over 4 years ago
    by Nicolas S
  • Not Answered

    How to dock to command Window in Orcad Capture 0

    14811 views
    3 replies
    Latest over 4 years ago
    by DrZ80
  • Discussion

    Sigrity System Explorer/Speed2000 sim: Simulation with long duration ends with 'Simulation Aborted' Locked

    1173 views
    0 replies
    Started over 4 years ago
    by deezer
  • Discussion

    Trace end square

    13714 views
    4 replies
    Latest over 4 years ago
    by Nicolas S
  • Not Answered

    Capture / Allegro V17.4 Issues 0

    22518 views
    21 replies
    Latest over 4 years ago
    by RFinley
  • Discussion

    How to void filled rectangle from Siilkscreen top

    12312 views
    2 replies
    Latest over 4 years ago
    by Nicolas S
  • Discussion

    VRM report not able to edit in DC Analysis Block Diagram Result of Power dc sign off report Locked

    10739 views
    0 replies
    Started over 4 years ago
    by jishu
  • Discussion

    Need help with axlGetMetalUsageForLayer

    9492 views
    2 replies
    Latest over 4 years ago
    by luanvn81
  • Answered

    Replace off-page connector by Hierarchical Port - Allegro Design Entry CIS 16.6 0

    8571 views
    8 replies
    Latest over 4 years ago
    by David George
  • Discussion

    How to highlight component based on degree? Locked

    11256 views
    1 reply
    Latest over 4 years ago
    by steve
  • Discussion

    ignoring Spacing Rule of Constraint Manager for "Line to Route Keepout Spacing" Locked

    3085 views
    1 reply
    Latest over 4 years ago
    by steve
  • Discussion

    Etch Back routing External DRC error

    13634 views
    0 replies
    Started over 4 years ago
    by ichliebedich
  • Discussion

    SKILL entry into the Windows command line terminal ?

    11885 views
    5 replies
    Latest over 4 years ago
    by FuzzzB
<>

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information