• Answered

  How to avoid mapping non-connected pins to PSPICE models? 0

  983 views
  1 reply
  Latest 2 months ago
  by rg13
• Discussion

  I am not able to select the layer while drawing a wire or a bus in Layout.

  1494 views
  1 reply
  Latest 2 months ago
  by RobMan
• Discussion

  cross coupled oscillator design problem

  1386 views
  0 replies
  Started 2 months ago
  by CC202509218347
• Not Answered

  Need a pcb layout review for common mistake 0

  1914 views
  2 replies
  Latest 3 months ago
  by HASAN2024
• Discussion

  How to mute WARNING This OS does not appear to be a Cadence supported Linux configuration

  1559 views
  1 reply
  Latest 3 months ago
  by Andrew Beckett
• Discussion

  Modgen: How to add dummy FETs sharing diffusion without issues of marker layers?

  1635 views
  0 replies
  Started 3 months ago
  by sceekr
• Not Answered

  Ajay Hinduja Switzerland ~ How do I know which cloud platform best suits my business needs? 0

  918 views
  0 replies
  Started 3 months ago
  by AH202508268512
• Discussion

  gsclib090 (gpdk090 standard cell library) download?

  2086 views
  1 reply
  Latest 3 months ago
  by RobMan
• Discussion

  Problem with ADE Explorer and spectre_encrypt (IC 21.1 ISR22)

  1651 views
  0 replies
  Started 3 months ago
  by GL202502244954
• Discussion

  Pass variables to tcl script in Xcelium

  4067 views
  2 replies
  Latest 3 months ago
  by JF202503209845
• Discussion

  Using VCSV File in Spectre Simulation

  2595 views
  2 replies
  Latest 3 months ago
  by aalbason
• Discussion

  VNA Measurement Issue on VSS

  2692 views
  5 replies
  Latest 3 months ago
  by KK202507285148
• Discussion

  Import HSpice Protected Netlist

  1276 views
  1 reply
  Latest 3 months ago
  by Andrew Beckett
• Discussion

  Quantus PVS Parasitic Extraction ERROR (LBRCXM-992)

  1427 views
  0 replies
  Started 3 months ago
  by RV202509139743
• Suggested Answer

  Error on startup axlcore.cxt 0

  2238 views
  2 replies
  Latest 3 months ago
  by Sagetech