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Verification: The Importance of Ecosystems in the Internet of Things Era

fschirrmeister

As we develop electronics in early 2014, the battle between processor architectures is raging in all spaces, from deeply embedded through mobile to servers. Choosing the right ecosystem partners is crucially important, and today's announcement of...
- 11 Mar 2014
Analog/Custom Design: Fast Yield Analysis and Statistical Corners

Lorenz

The Virtuoso Analog Design Environment XL Monte Carlo sampling methods are Random, Latin Hypercube, and Low Discrepancy Sequence. More accurately, Spectre provides the engine and ADE XL interfaces with the simulator to complete the Monte Carlo analysis task. Random is the standard random sampling method. Latin Hypercube (LHS) is an enhanced method that converges faster. Low Discrepancy Sequence (LDS) is the most recently…
- 10 Mar 2014
Verification: Randomizing Error Locations in a 2D Array

teamspecman

A design team at a customer of mine started out with Specman for the first time, having dabbled with a bit of SystemVerilog. I can't reveal any details of their design, but suffice to say they had a fun and not-so-simple challenge for me, the outcome of which I can share. Unlike some customers (and EDA vendors) who think it's a good test for a solver to do sudoku or the N-Queens puzzle (see this TeamSpecman blog…
- 10 Mar 2014
SoC and IP: RealTek Shows New HiFi-based Codec with Software from Sensory and ForteMedia

PaulaJones

Watch these demonstrations of RealTek's new ALC5677 audio codec - which uses HiFi EP running software from Sensory and ForteMedia.

http://youtu.be/VMPOhU_rYuM

In the above demo, Jason from RealTek shows how ForteMedia's iS620 noise processing software can be used for multi-microphone voice processing. iS620 dramatically improves the user experience in voice communication and voice recognition for smartphones.…
- 10 Mar 2014
Analog/Custom Design: Virtuosity: 14 Things I Learned in January and February 2014 by Browsing Cadence Online Support

stacyw

Time just got away from me last month, so here's two months worth of new content for your browsing enjoyment...
Videos
1. Integration Constraints Capability used in Mixed Signal Design Implementation
Explains and demonstrates the integration constraints capability of the Cadence Mixed-Signal Solution.
2. Virtuoso Floorplanning Design Flow Demo
Demonstrates the Virtuoso Floorplanner Flow: soft and hard blocks, defining cell…
- 7 Mar 2014
System, PCB, & Package Design : Customize Your Menus Dynamically with SKILL in Cadence Allegro 16.6-Based Layout Editors

Jeff Gallagher

Many users of the Allegro, APD, and SiP tools are familiar with the great flexibility that allows them to extend and modify the tool to meet their specific requirements. This might mean custom SKILL tools developed in-house, scripts/macros to automat...
- 5 Mar 2014
Whiteboard Wednesdays: Whiteboard Wednesdays—How 2D Solutions Help Close the Memory Wall Gap

References4U

In this week's Whiteboard Wednesdays episode, Scott Jacobson deep dives into 2D memory solutions like EMMC 5.0, UFS, and DDR4. Scott highlights how these solutions can help address CPU performance and power requirements and memory ability to deliver to these needs.

www.youtube.com/watch
- 4 Mar 2014
SoC and IP: MIPI Protocols—Making Mobile Happen at MWC

PaulaJones

MIPI protocols are expected to ship in over 4 billion mobile devices this year. That's billion with a "b".

Every year, new products are introduced at Mobile World Congress in Barcelona. Without MIPI interfaces, these products would not be able to perform nearly as well. You may not have heard about CSI-2, DSI, D-PHY, or many of the other MIPI standards, but thankfully there's the MIPI Alliance, a global…
- 3 Mar 2014
SoC and IP: Android Audio Offload Explained at Mobile World Congress

PaulaJones

Want to lower power in your next Android^TM device? Look to the industry's first Android-compatible technology for a licensed audio DSP. The Tensilica® HiFi Audio Tunneling for Android takes full advantage of the enhancements in the recent KitKat release to prolong battery life, cutting audio processing power by up to 14X, which results in double the smartphone playback time.

How does this cut the power? By completely…
- 3 Mar 2014
Verification: New Incisive Verification App and Papers at DVCon by Marvell and TI

Pete Hardee

If you're an avid reader of Cadence press releases (and what self-respecting verification engineer isn't?), you will have noticed in our Incisive 13.2 platform announcement back on January 13^th that Incisive Formal technology, with our new Trident cooperating multi-core engine, took top billing. But you would have needed to be very diligent to have followed the link in the press release to the Top 10 Ways to Automate…
- 27 Feb 2014
System, PCB, & Package Design : What's Good About DEHDL’s Cross Referencing of Hierarchical Nets? 16.6 has Several New Enhancements!

Jerry GenPart

The 16.6 Design Entry HDL (DEHDL) Cross Referencer has some new enhancements to report on hierarchical nets.

Read on for more details …

Just a quick post this week to share with you a couple new capabilities in the DEHDL Cross Referencer.

There is a new option to generate Cross References using nets from all levels of the schematic hierarchy:

Each net instance contains Cross References for the net instances across…
- 26 Feb 2014
Verification: Incisive vManager at DVCon - Come See It!

John Brennan

Have you heard the news? There is a new version of vManager announced this week, right in time for DVCon. vManager has been completely re-architected to be a database driven environment, scaling to multiple users and supporting gigascale size designs.. And, with ever growing verification requirements there is now a need for highly coordinated verification teams. With 100x more scalability and 2x greater verification productivity…
- 25 Feb 2014
Whiteboard Wednesdays: Whiteboard Wednesdays - How the MIPI Alliance Works to Enhance Mobile Devices

References4U

In this week's Whiteboard Wednesdays episode, Moshik Ruben, Product Marketing Director at Cadence, highlights the MIPI Alliance's focus on standardization to help improve today's mobile devices. Moshik discusses MIPI protocols including CSI-2, DSI, D-PHY, SLIMBUS, M-PHY, UniPro, UFS, CSI-3, LLI and DDRF. This year alone, these protocols are projected to be shipped in over 4 billion mobile devices.

www.youtube…
- 25 Feb 2014
Analog/Custom Design: What's the Worst that Could Happen?: Worst-Case Corners in ADE GXL

stacyw

In addition to combinations of temperature range and power supply voltages (usually more than one), the process design kit which landed on your desk yesterday presented a bewildering alphabet soup of device corner combinations which you need to consider when verifying your circuit design.
Fast/slow, high/low, pre/post. If I have to spend the time to run all the possible combinations, I won't have much time left to tune…
- 24 Feb 2014
Whiteboard Wednesdays: Whiteboard Wednesdays - Implementing Always-On Audio

References4U

In this week’s Whiteboard Wednesdays episode, Gerard Andrews, from the Tensilica Audio DSP Group at Cadence, discusses always-on audio functionality. Gerard details features like voice trigger, sensor fusion, and low-power audio playback, and explains how Cadence’s HiFi DSP solution can help you successfully implement always-on audio technology in today’s mobile devices.

www.youtube.com/watch
- 18 Feb 2014
Analog/Custom Design: What Your Circuit Doesn't Know, Can Kill It!

NewYorkSteve

Device variation has been a long-standing problem in custom design. Over the years, our customers have made many attempts to model the behavior though parameterization, simulation model extensions, sub-circuits, and by just "guessing" as to what might happen. As the mathematical complexity of each node increases, so does the difficulty of making sure all the design possibilities…
- 14 Feb 2014
System, PCB, & Package Design : Improve Design Quality with Adjacent Layer Object Avoidance in the 16.6 Cadence APD and SiP Layout Tool

Jeff Gallagher

In this week's discussion, let's take a look at a cornerstone of every good substrate design: plane shapes and voiding. In particular, what do you do if you need to void around an object on one or more layers of the object itself, whether a c...
- 13 Feb 2014
Verification: e Language Editing with Emacs

teamspecman

Specman and e have been around for a while, and some clever people have developed a nice syntax highlighting package for Emacs. What does this package do? Well, have a look yourself:

Editing in Emacs with the Specman mode
And

Editing in Emacs without the Specman mode
As you can see, the Specman mode gives you syntax highlighting, automatic indentation, it detects comments and shows them in different font or color if…
- 12 Feb 2014
Whiteboard Wednesdays: Whiteboard Wednesdays - What is VIP?

References4U

Today, our continuing Whiteboard Wednesdays video blog series will provide an overview of Verification IP and how it helps test today’s complex SoCs.

Watch this week's episode to hear Tom Hackett, product marketing director at Cadence, talk about the important role that VIP plays in the verification process. Tom details how VIP provides known good designs and stress testing for all interfaces and memory components…
- 11 Feb 2014
System, PCB, & Package Design : What's Good About Allegro/OrCAD/Sigrity Quarterly Incremental Releases (QiRs)? Check Out 16.6!

Jerry GenPart

You’ve no doubt seen announcements (either via customer emails, on the Cadence website, on the Cadence Customer Support portal, etc.) about Quarterly Incremental Releases (QiRs). QiRs have been made available for over a year now with a focus on updates to the 16.6 release.

In case you’re not familiar with QiRs, they are an exciting new way of bringing Cadence users valuable new features without having to wait for…
- 11 Feb 2014
Verification: Incisive Verification: Top 10 Things I Learned While Browsing Cadence Online Support Recently

SumeetAggarwal

There is always a demand, in most corners of the world today, for learning and troubleshooting something simply and quickly. Most users of any product or tool want access to a self-service knowledge base so that they can go and troubleshoot the issue on their own. They do not really want to sit through a long training class and also pay money; rather, they are of the type who have the knack to figure things out on…
- 11 Feb 2014
SoC and IP: My Love-Hate Relationship with Mobile World Congress

PaulaJones
My friends are jealous. I get an all-expense-paid trip to Barcelona, Spain to see the latest and greatest mobile technology at Mobile World Congress (MWC). They don't believe it when I tell them I love the yearly trips to Barcelona, but also hate it.
What I love about Barcelona and MWC:
Staying in the Gothic quarter, with all the good food and entertainment.
The nice busses we rent that take us directly to and from the…
- 5 Feb 2014
Whiteboard Wednesdays: Whiteboard Wednesdays—Imaging, Video, and Embedded Vision

References4U

Today, our continuing Whiteboard Wednesdays video blog series will shed some light and provide practical insights on imaging video.

In this week's Whiteboard Wednesdays episode, Gary Brown, from the Tensilica Imaging and Video Division at Cadence, talks about imaging, video, and embedded vision technologies that are being worked on today. Gary gives a high-level overview of the industry sectors and end products that…
- 4 Feb 2014
Verification: Cadence and AMD Add New UVM Multi-Language Features

Adam Sherer

The UVM Multi-Language Open Architecture open-source library was recently updated with new features. The hallmarks of this solution continue to be the ability to integrate verification components of multiple languages and methodologies at the testbench level, expanding beyond simple connectivity at the more limited data level, and the multi-vendor support.

Interestingly, multi-language is a bit of a misnomer…
- 4 Feb 2014
SoC and IP: Latest Developments in Ethernet Standards

ArthurM

Cadence is committed to supplying Ethernet silicon and verification IP to help its customers develop Ethernet solutions. The IEEE 802.3 Ethernet standards committee recently held an interim meeting in Indian Wells, California.

The location and weather were good.

And I got to see a joshua tree:

I blogged about the progress being made with Ethernet standards last December. Here is an update from the January meeting:

802.3bj…
- 3 Feb 2014

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