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System, PCB, & Package Design : What's Good About SCM and Packageable Schematics? The Secret's in the SPB16.3 Release!

Jerry GenPart

Many customers want to use System Connectivity Manager (SCM) known as Allegro System Architect (ASA) for quick prototyping and then start using the traditional schematic based PCB design flow. Now with the Export Schematic feature available in the SPB16.3 release, you can use System Connectivity Manager to quickly capture design logic, especially for high pin-count devices and its associated connectivity, and then generate…
- 12 May 2010
SoC and IP: Enterprise-class HDDs due to disappear, soon. All hail the enterprise-class SSD.

archive

The great Grand Poobah of SSD research Jim Handy released an industry report on Enterprise SSDs last month. Enterprise applications are currently where SSDs really shine because enterprise users can translate time into money far more easily than can clients running PCs and laptops. Because SSD speed improvements are so easy to justify in terms of total cost of ownership, SSDs are quickly finding welcome spots in all manner…
- 10 May 2010
SoC and IP: Last call for free DAC tix

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The DAC 2010 (DAC47) free exhibit passes program has been a big success with more than 1000 free exhibit passes already claimed. If you’re procrastinating, ask yourself “Why haven’t I signed up for a free exhibit pass yet? Is there really a zero-percent chance that I’m going to DAC?”

If there is zero chance you’re going to DAC and you’re in the business of designing ICs, then you’d better ask yourself another couple…
- 10 May 2010
Verification: Inside Cadence: Training for EDA360

jvh3

Over the past few weeks all of Cadence's Verification and Systems Solutions Applications Engineers (AEs), Services Engineers, and many Customer Support staff, have been brought together for detailed methodology and product training. The objectives of this ambitious undertaking are to bring their skills up to date, brief them on all the roadmaps, and in general prepare them for the challenges expected in the coming…
- 6 May 2010
Verification: FMCAD Call for Papers Extended to May 12

TeamVerify

Team Verify would like to inform you about the final call for papers for FMCAD 2010 (Formal Methods in Computer-Aided Design), being held 20-23 October 2010 in Lugano, Switzerland.
This conference has traditionally focused on research on formal methods in academia and industry. However, this year the conference is expanding to bridge the gap between research and real world applications, supported by a whole new "industrial…
- 6 May 2010
SoC and IP: SSDs don’t need disk interfaces. Case in point: OCZ’s USB 3.0 SuperSpeed Enyo

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Most SSDs are designed to be interface- and form-factor-compatible with existing rotating mass storage devices (aka: hard drives or HDDs). However, that need not be the case. Many SSD vendors are making significant sales by offering SSDs with alternate interfaces. Fusionio’s SSDs are based on PCIe for example. Perhaps the SSDs with the highest unit volume are lowly USB sticks, although their performance leaves a lot to…
- 6 May 2010
SoC and IP: New White Paper discusses the challenges of chip design based on AMBA 4

archive

ARM’s series of AMBA specifications have become a de facto standard for SoC (system-on-chip) interconnects. ARM introduced the first version of the specification more than 15 years ago and has now released the latest version of the specification, called AMBA 4. The AMBA 4 specification is actually a collection of specifications (including AXI4, AXI4-Lite, and AXI4-Streaming) that may well revolutionize the future of high…
- 5 May 2010
SoC and IP: Memory Market Outlook for 2010: How Bad (or Good) is it?

archive

If you’ve been following the roller-coaster ride that constitutes the global semiconductor memory market, then you’re probably looking over the shoulders of as many memory analysts as possible, trying to find one whose crystal ball isn’t cracked, fused, melted, or blackened. Memory analyst Lane Mason recently spent some time at Denali Software and recorded a Webcast with his overview of recent events in the global memory…
- 5 May 2010
System, PCB, & Package Design : What's Good About DEHDL Alignment? You’ve got it in the SPB16.3 Release!

Jerry GenPart

Schematic construction requires a lot of effort in placing components, wires and text/notes in such a way that the end schematic looks neatly organized. Aligning and distributing objects on a schematic can be time-consuming if it has to be done manually.
The Alignment and Distribution functionality provided in the SPB16.3 Allegro Design Entry HDL (DEHDL) product helps in speeding up the design entry process by easing the…
- 5 May 2010
Verification: Informative Tweets on WHEN Inheritance

teamspecman

Earlier today a lively and very instructive thread on the relative virtues of WHEN Inheritance developed on Twitter between @pmarriott (a D&V consultant in Montreal, Canada), @yaron_think_ver (a verification consultant based in Israel), and @teamspecman.
Because this exchange was very technical -- hence, beneficial to Specmaniacs -- for those of you not yet on Twitter allow us to replicate the thread here, plus address…
- 4 May 2010
Verification: What Does EDA360 Mean for Verification Engineers?

tomacadence

I trust that most of you have seen the recent flurry of blog posts and articles about the new Cadence "EDA360" vision. I was working on a blog entry on how this links to my world of verification when I saw my colleague Jack Erikson post "What Does EDA360 Mean for Logic Designers?" Since I liked his title, I've stolen borrowed and adapted it for my own purposes. This is by no means the final word…
- 3 May 2010
Verification: System Realization activities at CDNLive! EMEA this week

Steve Brown

CDNLive! EMEA will be held in Munich again this year, and there’s lots of news about Cadence’ offerings to address the productivity gap in Systems Realization. Here are the System Realization activities, customer presentations, and Cadence present...
- 3 May 2010
SoC and IP: Magnetic nanodot materials breakthrough presages high-density MRAM--possible competition for DRAM and Flash in five years or so?

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From North Carolina State University (NCSU) comes news of a materials breakthrough that promises extreme density for magnetic RAM (MRAM) devices, possibly in as little as five years or so. Dr. Jay Narayan, the John C. Fan Distinguished Chair Professor of Materials Science and Engineering at NCSU, presented a paper last month at the spring meeting of the Materials Research Society (MRS) detailing his team’s success in…
- 3 May 2010
SoC and IP: More free DAC exhibit tix; One more chance to win an Apple iPad

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A bit more than a week ago, this blog carried the news that you could get a free exhibit pass to the upcoming DAC in Anaheim if you work for a semiconductor company, OEM, or a system or service provider in the electronics industry (as long as your company isn’t a DAC exhibitor this year). You are also eligible for a free exhibit pass if you’re out of work and are looking for a new position. The first 500 people to sign…
- 3 May 2010
SoC and IP: Samsung announces imminent release of a multichip module integrating DRAM and PCM for Smartphone applications

archive

Hot on the heels of Numonyx’ announcement of two commercial PCM (phase-change memory) products (see “Numonyx 128-Mbit serial- and parallel-I/O PCM non-volatile memories now available in volume”), Samsung announced on April 28 that it plans to ship a device “later this quarter” that integrates DRAM and PCM devices into a multichip package (MCP). Samsung has named its flavor of PCM “PRAM” for “Phase-change RAM.” The PRAM…
- 3 May 2010
Verification: See You at CDNLive! EMEA

jasona

Today, Team Specman reported that next week's CDNLive! is shaping up to be a big event. I'm happy to report that in addition to the top notch people mentioned there, the entire ISX team will be in attendance! As is the case every ye...
- 30 Apr 2010
Verification: 2010 CDNLive Munich Guide for Specmaniacs

teamspecman

Good news for Specmaniacs based in the EU: next week from May 4-6 is the annual CDNLive! event in Munich. An overview of the conference with info on how to register is here: http://www.cadence.com/cdnlive/eu/2010/pages/agenda.aspx
Even better (from a Specmaniac perspective), none other than e/Specman co-creator Yoav Hollander will be at the event, along with verification guru Mike Stellfox. Also be sure to meet the newest…
- 30 Apr 2010
Verification: Team Verify's 2010 CDNLive Munich Guide

TeamVerify

We're excited to report that next week's annual CDNLive! event in Munich will feature many papers of interest to end-users of Incisive Formal Verifier ("IFV"), Incisive Enterprise Verifier ("IEV"), or anyone interested in either "pure formal" verification, integrated formal analysis and simulation verification, and assertion-based verification (“ABV”).
An overview of the conference…
- 29 Apr 2010
System, PCB, & Package Design : What's Good About APD’s Super Smooth Routing? See for yourself in the SPB16.3 Release!

Jerry GenPart

When using the point-to-point routing in the packaging products (APD and SIP), customers spend a significant amount of their efforts to clean up the traces after routing. The “Custom Smooth” function provides this capability, but a separate step is needed. In the SPB16.3 release, the new option - “Super Smooth” - in the smooth options of several GUI forms for the Add Connect and Slide will facilitate this process.

What…
- 29 Apr 2010
Verification: Harris-Cadence-Mathworks-Xilinx Success Cuts Verification Time 85%

Adam Sherer

More and more often it takes a village to achieve verification success. As reported recently by MathWorks, Harris pulled together technology and support from Cadence, MathWorks, and Xilinx to cut their verification time by more than 85% and achieve a defect-free FPGA implementation.
“EDA Simulator Link provided a direct co-simulation interface between our MATLAB model and our logic simulator, which enabled us to verify…
- 29 Apr 2010
SoC and IP: NAND Flash as the media killer: Sony to kill the floppy in Japan, finally

archive

Sometimes it takes decades but NAND Flash semiconductor memory is turning out to be quite the media killer. Over the last decade, NAND Flash memory has killed off 35mm photographic film for all but the most dedicated still-photography enthusiasts. With the advent of dSLR (digital single-lens reflex) cameras that also shoot video, such as the Canon 5D and 7D dSLRs, NAND Flash memory now seriously threatens to replace photographic…
- 28 Apr 2010
System, PCB, & Package Design : Favorite Features of an IC Package Designer: Flexible 3D Viewing

TeamAllegro

This is the first in a series of discussions we would like to open up regarding “favorite features” in an IC Packaging implementation design tool. We talk to customers all the time that are designing IC packages with stacked die. While t...
- 28 Apr 2010
Verification: Verified by e/Specman: The Palladium XP Verification Computing Platform

teamspecman

After much anticipation, it feels great to be free to proclaim that e/Specman (as part of IES-XL) was used with a complete, vPlan-based, metric-driven verification flow to verify the primary chips inside the new Palladium XP Verification Computing platform.

In a future post we’ll share with you some interviews with our colleagues in R&D that did this verification work, as well as how the machines in this new product line…
- 27 Apr 2010
SoC and IP: Corsair Video vividly shows SSD speedup on laptop

archive

Wondering whether an SSD really makes that much difference to laptop performance? Wonder no longer. Corsair has posted the following video that graphically illustrates how much faster boot and application loading times are when there’s an SSD present. This video should leave no doubt in your mind. In particular, watch as the video has to speed up while the HDD-equipped laptop is doing pretty much nothing.

[video…
- 26 Apr 2010
Digital Design: Hands Up, Anyone Believe That Toyota's Problems Are All Physical?

PeteMc

In the past number of weeks/months we have all seen how Toyota has struggled to manage perception around their "sudden acceleration" problems. The first fix that was proposed was a replacement of the floor mats, under the argument that the mats had been forcing the gas pedal down. Quickly following this first "solution", Toyota announced that they were issuing a recall to fix the mechanics of the gas pedal, adding…
- 26 Apr 2010

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