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For this post welcome guest blogger Hilmar van der Kooij. Hilmar is a Cadence Application Engineer for our Metric Driven Verification solutions. He has expertise in applying Metric Driven Verification both in simulation as well as formal analysis. Himar is based in beautiful Stockholm, Sweden. Besides living the Jetset Verification Lifestyle, he enjoys playing around with an old-fashioned film photocamera.

Thanks Hilmar for…

Accurate phase-noise characterization is critical in the design of RF and microwave communication systems. SpectreRF’s shooting PSS/Pnoise analysis has been the golden simulator for the phase-noise simulation, and close correlation between the simulation...

With SPB16.2 release, Capture-CIS allows you to create and use relational tables in the parts database. These tables have a one-to-many relationship with part information (primary) tables. For example, the database may contain a Vendor table with multiple vendor / manufacture part numbers for one company part number in your Resistor table. This structure allows you to query for data across the primary and relational tables…

It was a delight when I read the blog by Bill Schweber of TechOnline's RF DesignLine titled “Getting some basic RF experience”. I was surprising pleased that somebody took the time to talk about how one might get the feel for RF. That is because what Bob talks about is more or less how I gained some of the experience that lead me to pursue this decades later.

I have always been fascinated by radio…

In this last segment of the series on performance-aware coding, allow me to share with you two tips on improving the performance of Temporals.

Temporals Performance Tip 1: Setup a "Synch Unit"
If you don't already use a synch unit - I recommend you setup one up now. Here's why: the synch unit contains ports connected to the device under test, and it defines events based on these ports. Thus, when working…

If you are an RFIC designer then I hope you are planning on attending the 2009 RFIC Symposium and the International Microwave Symposium (IMS) which will be held in Boston, Massachusetts, as the centerpieces of Microwave Week 2009, scheduled from Sunday...

If your only news source were some of the common EDA pundits, you would likely believe that VoltageStorm is all but dead, and that Apache was the only game in town, but that is very far from the truth. So what has happened to VoltageStorm since Cadence acquired Simplex back in 2003? The easy answer is “a lot”.

If you have read my bio, I came to Cadence from Simplex and so power integrity analysis is close…

Step into any Starbucks hotspot or Wi-Fi cafe, and you'll see something that was unthought of just 10 years ago: people working on laptops, accessing wireless internet at broadband speeds. I don't know about you, but to me, that is simply amazing. Imagine, 10 years ago we would have been content with surfing the internet at 56k dialup speeds. Now, we've come to expect consistently fast broadband speeds. If a website takes…

FAQs: What happened to the "SVM" documentation, and to SVM in general? Has SVM been absorbed into OVM, or what?

Answer 1:
The good news is that the "System Verification Methodology", or "SVM" for short, is alive and well. First, its documentation and examples have been always been part of the Cadence® Incisive® Plan-to-Closure Methodology since "IPCM" was released in December 2006. Fast forward to the…

I decided to switch gears a bit and write about an interesting article I read in Electronic Engineering Times (April 6, 2009) - "Social networking: Boomer adoption Up, Gen Y Flat" by Junko Yoshida. 

What I found fascinating is that us "old time" Baby Boomers are increasing the volume of blogs we read, social networking, and podcasts we listen to by 67%. Our counterpart Gen Y'ers (while having a larger…

It has been a while since I last appended, hope you are well!

It was a little bit difficult to come up with a subject to write about and then recently I was in a meeting where we were talking about transient noise analysis. A designer was discussing...

I found myself getting a little bit frustrated with some of the default colors that would come up in the VIVA waveform tool while I was plotting from the Analog Design Environment (ADE). After working with Kabir, the Product Engineer for VIVA, I discovered...

I suspect that in another year we’ll all stop talking about OpenAccess (OA) like it is something special and treat it the way it should be, that it is just another database. Having said that, I know I’m going to get plenty of email about my portrayal of OA from colleagues and others but that is the way I see it.

Let’s not fool ourselves, today OA is a big deal because it truly is a different way…

Allow me to digress from EDA subjects to herald the birth of my first child!

She arrived Saturday April 18 at 5:07am, weighing in at healthy 7 lbs., 1 oz.

Mom and baby are doing fine.

As you may expect, I'll be taking a break from blogging for a few weeks, but of course Team Specman and the whole Functional Verification and Systems Design & Verification blog streams will continue to inform & enlighten…

Specman 8.2s3 contains a new API to the sequence driver that enables users to improve the performance of stimulus creation.  With this API you can create stimulus items in an efficient manner, and reduce the number of context switches between the sequence and its driver. For example, instead of many generation actions, you can simply send items from a list:

for each in input_list {
    driver.wait_for_grant(me);
    driver…

OK - so maybe I got a little bit too happy with acronyms (STUFF doesn't represent anything other than ... more stuff).

We're back to exploring the new SPB16.2 features in Allegro System Architect (ASA)/System Connectivity Manager (SCM).

TCL
For those who may not know - "Tcl (Tool Command Language) is a very powerful but easy to learn dynamic programming language, suitable for a very wide range of uses…

In this introductory Part I of V of this blog I will discuss the advanced node design challenges impacting CIC design convergence and the solutions to achieve expedited physical implementation convergence.

As designers move to 65nm technologies and below, the convergence of performance-driven design constraints and yield-driven manufacturing constraints intensifies the demand for new approaches for integrated circuit (IC)…