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Are you busy debugging your environment topology and coming up against components getting unexpected data? Have you found yourself asking “who is passing data to this monitor, and why?”?

Components in the environment interact using ports (TLM ports, method ports, simple ports, and so on). This blog tackles the challenge of debugging a “bad connection”—an in port bound to the wrong out port…

Through the 1990s, Cadence made lots of smaller acquisitions. In 1997, Joe Costello stepped down as CEO and passed the reins to Jack Harding, who had joined Cadence earlier that year when Cadence had acquired Coopers and Chyan Technology, which had a...

Far more often than we imagine, we think about China within the context of the complicated technology we create. The ‘I want it now’ generation is driving the need for higher performance products and that need is increasingly fulfilled by companies in China. That’s why we went for Tech Shanghai 2016. And we brought gifts.

The electronics industry in China can be measured as a million souls, although…

TSMC is a manufacturing powerhouse. It has twice the capacity of any other non-memory semiconductor company. It has the best yield in the industry, driven by collecting over 1M datapoints per second from the equipment in its fabs. They are the only company...

In two weeks time (or a fortnight as we say in Britain) is CDNLive Silicon Valley: April 5-6 in the Santa Clara Convention Center. While there are some presentations by Cadence employees, the buik of the presentations are by real users of Cadence tools...

One of the reasons why verification engineers love e is the power it gives them as no other language can. The combination of macros, reflection and extension allows you to create high quality utilities that can be shared by verification teams all over your company.

Such utilities are an effective way to enhance the quality of the verification environment; the base type or template are created once by experts, and used…

Andy Grove, co-founder and long-time CEO of Intel, passed away on Monday. He was the most well-known CEO in the semiconductor industry, famous for the quote "only the paranoid survive" (also the title of one of his books on management).

He...

In this week's Whiteboard Wednesdays video, Tom Hackett takes a closer look at assertion-based Verification IP (VIP), what it is, and why it is useful.

https://youtu.be/BUUC6zIUOvg

At this year’s Technology Symposium, TSMC disclosed that they will provide two N7 processes, one for high-performance computing and one for mobile, presumably optimized for performance versus power and area. The other important announcement was the new 16 FFC automotive process for ADAS. Stay tuned as Cadence makes plans for these technologies!

Our news was focused on 16FF+. At the Symposium we demonstrated multi…

The Electronic Design Process Symposium (EDPS) has been held in late April or early May for 23 years. For as long as I have attended, it has been held in a hotel on the beach just north of Monterey. If you are lucky, you may catch sight of dolphins from...

To support academia using the latest industry-standard tools, Cadence's Stratus High-Level Synthesis is now available to universities.

Cadence Stratus High-Level Synthesis (HLS) is the first HLS platform that you can use across your entire system...

At the recent TSMC Technology Symposium, various speakers gave details of the various TSMC processes. Since the rules of the technology symposium are that you can take notes but not record the presentation, nor photograph anything (and they don't hand...

The idea to have a Tensilica Day at University of Hanover was born during CDNLive EMEA 2015. Professor Holger Blume, whose team has a lot of experience using Tensilica, offered to help us, to organize the event at his facilities and invite all universities...

Back in October we announced the TSMC 28HPC tapeout of our DDR/LPDDR 4/3 Combo PHY. Since then we have made great progress with customers, and our own silicon bring up. Most recently, the combo PHY IP is brought up in our lab and running at 2400 Mbps.

Many price sensitive consumer products continue to leverage 28nm technology for affordable high performance and low power consumption. Originally announced at Memcon 2014,…

When Willie Sutton was asked by the judge why he kept robbing banks, he said "because that's where the money is." Actually he denied ever having said it (although if someone accused me of making such a great epigrammatic quote, I'd run with it). Anyway...

Dark Silicon may sound like a character from the latest Star Wars movie, but it actually refers to limitations on power on large SoCs, which makes it increasingly difficult to power up the whole chip at the same time.

For years, we took advantage of...

When Bob Smith took over as the Executive Director of EDAC, I called him up and one of the things that we discussed was broadening its scope. There were two ways in which EDAC is very narrowly focused, one is geographical and one is EDA-centricity. It...

In this week's Whiteboard Wednesday's video, Gopi Krishnamurthy highlights how Cadence implements the higher speeds of PCI Express (PCIe) Gen4 into the PCIe controller and PHY IP.

https://youtu.be/jdzBLPa_X70

"The number of people predicting the end of Moore's Law doubles every two years." It's a good joke that I had forgotten until Friday when I read the Economist, the magazine that insists on calling itself a newspaper. I have been a subscriber since before...

Cadence has grown from a small startup to a $1.7B corporation. Its history includes companies that have come under the Cadence fold, to help drive Cadence's growth in those early days and also provide underpinning key technologies that the company continues...

Tensilica products are a bigger business than many people realize. The product line is #1 in DSP IP licensing revenue (since 2012) and is #2 in royalty-bearing licensable processors. 225 separate companies have licensed the technology, and they have created...

Last week was DVCon, the design and verification conference. Despite the D standing for design, DVCon is really the main conference focused on verification. The keynote on Verification: Past, Present, and Future was given by Wally Rhines, the CEO of Mentor...

SoC design groups don't do clouds. True, they take advantage of some of the underlying technology by running their own server farms, sometimes called internal clouds. But they don't take advantage of the economies of scale, and the accompanying cheap...