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Forum - Thread List
  • Suggested Answer

    Coordinates of the ends of a CLine in SKILL 0

    3176 views
    1 reply
    Latest over 2 years ago
    by DavidJHutchins
  • Not Answered

    Convert Line to CLine: axlChangeLine2Cline 0

    2814 views
    1 reply
    Latest over 2 years ago
    by DavidJHutchins
  • Discussion

    issue with assembler running corner simulations Locked

    7024 views
    1 reply
    Latest over 2 years ago
    by Andrew Beckett
  • Discussion

    MakeCell Locked

    7303 views
    2 replies
    Latest over 2 years ago
    by Andrew Beckett
  • Discussion

    Innovus does not route net with non-default rule correctly Locked

    3344 views
    2 replies
    Latest over 2 years ago
    by FormerMember
  • Discussion

    Shape/Layer Modifiers in AWRDE

    2103 views
    0 replies
    Started over 2 years ago
    by SimTech
  • Discussion

    Cooling your Electronics Systems

    8418 views
    1 reply
    Latest over 2 years ago
    by SimTech
  • Discussion

    How to derive edge phase noise from Output Noise in sampled Pnoise simulation Locked

    18027 views
    11 replies
    Latest over 2 years ago
    by Frank Wiedmann
  • Discussion

    Allegro - Tip of the week: Changing active/alternate layers by using function keys

    2756 views
    0 replies
    Started over 2 years ago
    by PCBTech
  • Suggested Answer

    SPMHDB 238 & SPMHGE 7 when saving .dra files 0

    2208 views
    1 reply
    Latest over 2 years ago
    by steve
  • Suggested Answer

    DRC for shape minimum width 0

    8405 views
    2 replies
    Latest over 2 years ago
    by steve
  • Discussion

    Catch glitches on DC signal. Locked

    7465 views
    3 replies
    Latest over 2 years ago
    by ShawnLogan
  • Discussion

    PLL noise verification problem (Cadence PLL RAK) Locked

    12147 views
    8 replies
    Latest over 2 years ago
    by ShawnLogan
  • Discussion

    Maintain display list on window Locked

    7625 views
    2 replies
    Latest over 2 years ago
    by RicardoGV1
  • Discussion

    expecting a valid compiler directive error in vams that is not in systemVerilog Locked

    8783 views
    1 reply
    Latest over 2 years ago
    by MikeVP
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