Custom IC Design

Latest Posts

Discussion

Making functional looking symbols

Category: Custom IC Design

By CADcasualty

$usertype
•
started over 7 years ago

0 replies • 13172 views
Discussion

finding at what time does 2 waveform cross each other

Category: Custom IC Design

By JagdishP

$usertype
•
updated over 7 years ago by JagdishP

5 replies • 17692 views
Discussion

Plotting generated waveforms in the same subwindow as simulated waveforms

Category: Custom IC Design

By CADcasualty

$usertype
•
updated over 7 years ago by CADcasualty

3 replies • 15633 views
Discussion

change temperature in one single transient simulation

Category: Custom IC Design

By enzhu

$usertype
•
updated over 7 years ago by enzhu

6 replies • 23909 views
Discussion

Varying the temperature in a transient simulation

Category: Custom IC Design

By Aksl

$usertype
•
updated over 7 years ago by Andrew Beckett

7 replies • 30088 views
Discussion

Defining waveform thicknesses and colors on a white background in VIVA

Category: Custom IC Design

By CADcasualty

$usertype
•
updated over 7 years ago by CADcasualty

16 replies • 26217 views
Discussion

Accessing ADE XL global variables from within systemverilog block

Category: Custom IC Design

By Abel Ace

$usertype
•
updated over 7 years ago by Abel Ace

2 replies • 15293 views
Discussion

Default font size for Virtuoso Visualization & Analysis

Category: Custom IC Design

By PSGcad

$usertype
•
updated over 7 years ago by findsriharsha

12 replies • 20128 views
Discussion

Gravity Snapping in IC 6.1.7

Category: Custom IC Design

By stefan6

$usertype
•
updated over 7 years ago by stefan6

2 replies • 16831 views
Discussion

Extract schematic from layout or verilog code

Category: Custom IC Design

By Navidrezara

$usertype
•
updated over 7 years ago by Navidrezara

2 replies • 15329 views
Discussion

dump for particular hierarchy.

Category: Custom IC Design

By kantamani

$usertype
•
updated over 7 years ago by Saloni Chhabra

1 replies • 14697 views
Discussion

ADE Assembler sweep config views problem

Category: Custom IC Design

By michael10

$usertype
•
started over 7 years ago

0 replies • 14166 views
Discussion

Plot transient OP vs. Time

Category: Custom IC Design

By HoWei

$usertype
•
updated over 7 years ago by HoWei

2 replies • 18056 views
Discussion

Assura Default License

Category: Custom IC Design

By 0nTheG0

$usertype
•
updated over 7 years ago by 0nTheG0

2 replies • 15157 views
Discussion

Extracting Noise Plots of Isolated Devices using Single Simulation

Category: Custom IC Design

By KGh94

$usertype
•
updated over 7 years ago by Andrew Beckett

1 replies • 14270 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.