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Custom IC Design

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  • Discussion

    Conversion of old Simulation Files

    Category: Custom IC Design

    By JavadBa

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    updated over 5 years ago by JavadBa

    4 replies • 14807 views
  • Discussion

    plotting waveVsWave across corner+global variable sweep in ADEXL

    Category: Custom IC Design

    By dzakharian

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    started over 5 years ago

    0 replies • 1519 views
  • Discussion

    double tail comparator input refered offset voltage measured using cadence

    Category: Custom IC Design

    By nkataria

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    updated over 5 years ago by sypetre

    8 replies • 19649 views
  • Discussion

    Spectre S-parameter analysis

    Category: Custom IC Design

    By cADEUser

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    updated over 5 years ago by Andrew Beckett

    12 replies • 39484 views
  • Discussion

    How do I load parametric analysis results in ADE L again to plot

    Category: Custom IC Design

    By Nader Fathy

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    updated over 5 years ago by Nader Fathy

    4 replies • 19315 views
  • Discussion

    Export Netlist with VerilogA subblock when there is no ADE license

    Category: Custom IC Design

    By quyleanh

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    updated over 5 years ago by quyleanh

    8 replies • 17462 views
  • Discussion

    fsdb to pwl

    Category: Custom IC Design

    By KOTB

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    updated over 5 years ago by Andrew Beckett

    4 replies • 19308 views
  • Discussion

    Unreadable font in cdshelp

    Category: Custom IC Design

    By SharksFan

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    •

    updated over 5 years ago by LukeAndrew

    11 replies • 20597 views
  • Discussion

    How to access Metal enclosures over Via

    Category: Custom IC Design

    By Utkarsh03

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    started over 5 years ago

    0 replies • 14128 views
  • Discussion

    Display Instance name in Layout

    Category: Custom IC Design

    By KishanCh

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    updated over 5 years ago by Andrew Beckett

    6 replies • 19510 views
  • Discussion

    Porting a design from one technology to another (even the finished layout)

    Category: Custom IC Design

    By FormerMember

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    updated over 5 years ago by Andrew Beckett

    4 replies • 4774 views
  • Discussion

    Worst case delay measurement

    Category: Custom IC Design

    By Aalelai

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    •

    updated over 5 years ago by Andrew Beckett

    3 replies • 16872 views
  • Discussion

    Unwrap a waveform

    Category: Custom IC Design

    By debaabed

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    •

    updated over 5 years ago by debaabed

    7 replies • 19915 views
  • Discussion

    How do I sweep a simulator option parameter (gmin, vabstol, rforce,...) in ADE Explorer / XL?

    Category: Custom IC Design

    By Johanny Saenz

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    updated over 5 years ago by Andrew Beckett

    1 replies • 16245 views
  • Discussion

    Flicker noise in switched-bias pMOS

    Category: Custom IC Design

    By GiuseppeICL

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    •

    updated over 5 years ago by FormerMember

    4 replies • 16711 views
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