Custom IC Design

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Discussion

Graph window size in VIVA using OCEAN

Category: Custom IC Design

By msharma

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updated 14 days ago by msharma

2 replies • 254 views
Discussion

PSS + PAC analysis of a parametric amplifier

Category: Custom IC Design

By GL202502244954

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started 14 days ago

0 replies • 198 views
Discussion

Issue while performing signoffTimeDesign in Innovus

Category: Custom IC Design

By VLSI lab IITB

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updated 14 days ago by VLSI lab IITB

2 replies • 245 views
Discussion

Save multiple values versus frequency using spectremdl for spectre version 2016

Category: Custom IC Design

By GM202510215619

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updated 15 days ago by GM202510215619

2 replies • 387 views
Discussion

Issue: SKILL Script Creates Schematic and Symbol But Ports Are Missing

Category: Custom IC Design

By Mooh

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updated 15 days ago by Mooh

2 replies • 340 views
Discussion

Parasitic capacitance

Category: Custom IC Design

By SamanMKD

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updated 17 days ago by Andrew Beckett

3 replies • 387 views
Discussion

Request for Support with CDF Update Issue after importing .spi file in virtuoso

Category: Custom IC Design

By yogeshjaiswalCAD

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updated 21 days ago by yogeshjaiswalCAD

6 replies • 975 views
Discussion

Ocean XL: running the same script twice makes the CIW stuck

Category: Custom IC Design

By MC20250412421

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updated 21 days ago by MC20250412421

4 replies • 558 views
Discussion

Layout scaling and inconsistent shape dimensions issue.

Category: Custom IC Design

By JS20250120924

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updated 21 days ago by JS20250120924

4 replies • 559 views
Discussion

Simulating Encrypted PSpice Model from TI (CSD95373AQ5M)

Category: Custom IC Design

By WW202601034742

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updated 22 days ago by WW202601034742

3 replies • 570 views
Discussion

Short-resistor removal for LVS cleaning (Cadence Virtuoso + Pegasus)

Category: Custom IC Design

By yogeshjaiswalCAD

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started 26 days ago

0 replies • 362 views
Discussion

Virtuoso (IC25.1) startup very slow (~5mins) after Linux Update

Category: Custom IC Design

By mahodk

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updated 28 days ago by Andrew Beckett

1 replies • 507 views
Discussion

PVS window closes whenever trying to browse for a file

Category: Custom IC Design

By matangk2

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updated 29 days ago by Andrew Beckett

3 replies • 577 views
Discussion

Calibre PEX run error

Category: Custom IC Design

By SamanMKD

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updated 1 month ago by Andrew Beckett

1 replies • 503 views
Discussion

clock buffer output RJ and edge phase noise result "diverges"

Category: Custom IC Design

By Yuto Lau

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started 1 month ago

0 replies • 183 views

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