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Custom IC Design

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  • Discussion

    design/global variables import from veilogA

    Category: Custom IC Design

    By Majco

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    started over 2 years ago

    0 replies • 822 views
  • Discussion

    Pixelate Custom Curved Polygon According to Grid in Virtuoso Layout Suite L

    Category: Custom IC Design

    By Herramar

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    •

    updated over 2 years ago by Andrew Beckett

    3 replies • 7110 views
  • Discussion

    Unexpected capacitor values in the av_extracted view file output?

    Category: Custom IC Design

    By Vishesh Gupta

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    •

    updated over 2 years ago by Vishesh Gupta

    6 replies • 7974 views
  • Discussion

    How to compare the before and after extraction values of resistance and capacitance?

    Category: Custom IC Design

    By Vishesh Gupta

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    •

    updated over 2 years ago by Vishesh Gupta

    8 replies • 8088 views
  • Discussion

    Title Block cell issue

    Category: Custom IC Design

    By Larry Allen

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    •

    updated over 2 years ago by Andrew Beckett

    6 replies • 7068 views
  • Discussion

    Importance of "Enable CellView Check" while filling the quantus assura extraction form?

    Category: Custom IC Design

    By Vishesh Gupta

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    •

    updated over 2 years ago by Vishesh Gupta

    2 replies • 1270 views
  • Discussion

    sum of sampled_noise output spectrum, how to access the phase information?

    Category: Custom IC Design

    By NewScreenName

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    updated over 2 years ago by NewScreenName

    14 replies • 9429 views
  • Discussion

    ERROR: ADE-5014 in ams simulation

    Category: Custom IC Design

    By sjwprcker

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    •

    updated over 2 years ago by sjwprcker

    2 replies • 7001 views
  • Discussion

    How to include extracted output in your adexl simulation?

    Category: Custom IC Design

    By Vishesh Gupta

    $usertype

    •

    updated over 2 years ago by Vishesh Gupta

    6 replies • 8098 views
  • Discussion

    Changing font in "graph summary labels"

    Category: Custom IC Design

    By rrihak

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    •

    started over 2 years ago

    0 replies • 706 views
  • Discussion

    Save certain waveform after simulations end while preserving corner order

    Category: Custom IC Design

    By Zaara

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    •

    updated over 2 years ago by ShawnLogan

    4 replies • 6952 views
  • Discussion

    Setting default independent variable in ADE Explorer/Assembler

    Category: Custom IC Design

    By CSCNalu

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    •

    updated over 2 years ago by Andrew Beckett

    1 replies • 1132 views
  • Discussion

    adexl does not run neither multicorner nor montecarlo simulations

    Category: Custom IC Design

    By gnangotzi

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    •

    started over 2 years ago

    0 replies • 5692 views
  • Discussion

    Single layer auto-routing

    Category: Custom IC Design

    By sumbadee

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    •

    started over 2 years ago

    0 replies • 5922 views
  • Discussion

    Hierarchical Net Name Preservation in Quantus

    Category: Custom IC Design

    By Anas Wanas

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    •

    started over 2 years ago

    0 replies • 6101 views
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