Custom IC Design

Latest Posts

Discussion

Warning in technology file (mfgGridResolution).

Category: Custom IC Design

By baumanets

$usertype
•
updated over 11 years ago by Andrew Beckett

3 replies • 14507 views
Discussion

How to calculate areaCap?

Category: Custom IC Design

By baumanets

$usertype
•
updated over 11 years ago by Andrew Beckett

5 replies • 14003 views
Discussion

LVS LAYOUT debug?!

Category: Custom IC Design

By tempVar

$usertype
•
updated over 11 years ago by tempVar

2 replies • 19947 views
Discussion

problem with flattern cell view in layout

Category: Custom IC Design

By whitefan

$usertype
•
updated over 11 years ago by whitefan

2 replies • 13176 views
Discussion

Special DC and Transient Analysis

Category: Custom IC Design

By Flyyn Rider

$usertype
•
updated over 11 years ago by Andrew Beckett

1 replies • 12975 views
Discussion

Warnings which are not consistent for the same magnitude of current

Category: Custom IC Design

By AnjanKumar

$usertype
•
updated over 11 years ago by Andrew Beckett

1 replies • 13156 views
Discussion

Hierarchy and layouts?

Category: Custom IC Design

By tempVar

$usertype
•
updated over 11 years ago by tempVar

2 replies • 16821 views
Discussion

Writing into a file in Verilog-A Model

Category: Custom IC Design

By RFStuff

$usertype
•
updated over 11 years ago by Andrew Beckett

8 replies • 21443 views
Discussion

libManager Qt Warning -> errors

Category: Custom IC Design

By kennethbrun

$usertype
•
updated over 11 years ago by Andrew Beckett

5 replies • 3849 views
Discussion

How to use skill function to move the instance ?

Category: Custom IC Design

By Provence

$usertype
•
updated over 11 years ago by Provence

2 replies • 14934 views
Discussion

Bindkey for layers below mouse cursor

Category: Custom IC Design

By bdjones1

$usertype
•
updated over 11 years ago by Andrew Beckett

5 replies • 15336 views
Discussion

Removing P&R boundary

Category: Custom IC Design

By Lynks

$usertype
•
updated over 11 years ago by Lynks

9 replies • 9765 views
Discussion

Problems to run PSP and BSIM3 compact models in verilog-A

Category: Custom IC Design

By ronaldomponte

$usertype
•
updated over 11 years ago by Andrew Beckett

3 replies • 14493 views
Discussion

Convergence Issues in MC Transient simulation

Category: Custom IC Design

By Flyyn Rider

$usertype
•
updated over 11 years ago by Flyyn Rider

5 replies • 15445 views
Discussion

Query on necessity of Filler Cells in a small custom design - Virtuoso

Category: Custom IC Design

By Shameel

$usertype
•
updated over 11 years ago by Andrew Beckett

1 replies • 1044 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.