Custom IC Design

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Discussion

Text output on Cadence Composer

Category: Custom IC Design

By archive

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updated over 15 years ago by Andrew Beckett

4 replies • 13582 views
Discussion

creating a matrix of instances in verilog-A

Category: Custom IC Design

By rickrevolta

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updated over 15 years ago by Andrew Beckett

2 replies • 16463 views
Discussion

Pin names

Category: Custom IC Design

By StreamCX

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updated over 15 years ago by Andrew Beckett

7 replies • 10432 views
Discussion

LvsIgnore Properties

Category: Custom IC Design

By frogconsultant

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updated over 15 years ago by frogconsultant

12 replies • 30646 views
Discussion

How to implement this equation in VerilogA

Category: Custom IC Design

By princemahmmod

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updated over 15 years ago by Andrew Beckett

4 replies • 15747 views
Discussion

Cadence 6 waveform error vpwl vsrc

Category: Custom IC Design

By StreamCX

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updated over 15 years ago by StreamCX

9 replies • 9096 views
Discussion

Output SPEF-file from QRC contains only top level ports

Category: Custom IC Design

By Slawa

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updated over 15 years ago by Quek

1 replies • 6112 views
Discussion

Off-Grid pins warning in abstract generation

Category: Custom IC Design

By affaq

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updated over 15 years ago by Alex Soyer

3 replies • 13891 views
Discussion

subciruit initiated top-level current probe

Category: Custom IC Design

By Kalimero

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updated over 15 years ago by Kalimero

5 replies • 16399 views
Discussion

cadence verilog ams environment setup question

Category: Custom IC Design

By Wing2

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updated over 15 years ago by EricCDN

1 replies • 18276 views
Discussion

How to short small resistor for lvs purpose

Category: Custom IC Design

By harleyMax

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updated over 15 years ago by Andrew Beckett

7 replies • 19294 views
Discussion

Manual editing of a p2lvsfile

Category: Custom IC Design

By Slawa

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updated over 15 years ago by Slawa

6 replies • 7506 views
Discussion

How to change the Internal Cell names

Category: Custom IC Design

By sathisha

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updated over 15 years ago by Quek

1 replies • 14550 views
Discussion

ASSURA41-614: ERROR rcAddRegionTasks

Category: Custom IC Design

By tkhan

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updated over 15 years ago by Andrew Beckett

3 replies • 13415 views
Discussion

How to add PVS menu in virtuoso layout editor

Category: Custom IC Design

By shushan

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updated over 15 years ago by shushan

2 replies • 14441 views

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