Custom IC Design

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Discussion

Sweeping component parameters for many components in ADE GXL

Category: Custom IC Design

By Kabal

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started over 11 years ago

0 replies • 13903 views
Discussion

Monte Carlo over swept oppoints

Category: Custom IC Design

By neuroAnalog

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started over 11 years ago

0 replies • 14022 views
Discussion

Problem in reading-in in Spectre

Category: Custom IC Design

By SaeedR

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updated over 11 years ago by Andrew Beckett

5 replies • 21188 views
Discussion

Grid spacing for 45nm GPDK process

Category: Custom IC Design

By madhanmo

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started over 11 years ago

0 replies • 14648 views
Discussion

How to eliminate unused empty cells when importing GDS

Category: Custom IC Design

By marklin

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started over 11 years ago

0 replies • 14503 views
Discussion

pipo.log and strmOut.log

Category: Custom IC Design

By radiowaves

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updated over 11 years ago by radiowaves

2 replies • 16385 views
Discussion

XL Layout issue with custom Library layout sourcing the Schematic.

Category: Custom IC Design

By JP Layout

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started over 11 years ago

0 replies • 13743 views
Discussion

freeze with virtuoso layout

Category: Custom IC Design

By Fabb

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updated over 11 years ago by Andrew Beckett

1 replies • 16229 views
Discussion

do stb analysis on five stage invter ring osc

Category: Custom IC Design

By xianweng

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updated over 11 years ago by xianweng

3 replies • 15813 views
Discussion

Unable to run Monte Carlo ADEXL-1723

Category: Custom IC Design

By Faizalism

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updated over 11 years ago by Andrew Beckett

3 replies • 14738 views
Discussion

How to do a parametric analysis for a model parameter ?

Category: Custom IC Design

By Ahmed Taha

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updated over 11 years ago by FormerMember

2 replies • 16286 views
Discussion

How to define a binary matrix parameter in Verilog A

Category: Custom IC Design

By microstudent

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updated over 11 years ago by microstudent

6 replies • 24692 views
Discussion

RLGC matrix size does not match between instance and model 'mtline'

Category: Custom IC Design

By SUEE

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updated over 11 years ago by SUEE

2 replies • 7796 views
Discussion

How to set bindkeys of Virtuoso alignment window

Category: Custom IC Design

By microstudent

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started over 11 years ago

0 replies • 15581 views
Discussion

Spectremdl and Verilog-A variable

Category: Custom IC Design

By dan9876

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started over 11 years ago

0 replies • 13792 views

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