Custom IC Design

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Discussion

Cadence Virtuoso try to compile every layout to pcell

Category: Custom IC Design

By mad monster

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updated over 10 years ago by mad monster

2 replies • 5913 views
Discussion

unable to open config()

Category: Custom IC Design

By MarkGr15

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updated over 10 years ago by Andrew Beckett

1 replies • 14473 views
Discussion

About .cdsinit file

Category: Custom IC Design

By bobbygang

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updated over 10 years ago by Andrew Beckett

8 replies • 29610 views
Discussion

Auto Checkout Preferences

Category: Custom IC Design

By ForcedToWork

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updated over 10 years ago by Andrew Beckett

4 replies • 16938 views
Discussion

Running Spectre in Command Line, Warning and Error

Category: Custom IC Design

By Milad M

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updated over 10 years ago by Milad M

2 replies • 15644 views
Discussion

spf in cadence

Category: Custom IC Design

By huadel

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updated over 10 years ago by Andrew Beckett

10 replies • 26272 views
Discussion

Usage of (* cds_inherited_parameter *)

Category: Custom IC Design

By chenchen

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updated over 10 years ago by Andrew Beckett

3 replies • 14101 views
Discussion

Model Report

Category: Custom IC Design

By analogy

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updated over 10 years ago by sgreenwo

2 replies • 13868 views
Discussion

Infopoints

Category: Custom IC Design

By analogy

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updated over 10 years ago by Andrew Beckett

5 replies • 14169 views
Discussion

ADE XL Dynamic Spec

Category: Custom IC Design

By Tobben24

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updated over 10 years ago by StefanHi

11 replies • 18661 views
Discussion

How to get the total area/length of a path with marknet ?

Category: Custom IC Design

By gnamde

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updated over 10 years ago by Andrew Beckett

4 replies • 2537 views
Discussion

where can I view OS support for cadence tools?

Category: Custom IC Design

By kainice

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updated over 10 years ago by Andrew Beckett

1 replies • 14849 views
Discussion

ADE XL simulation writing directory

Category: Custom IC Design

By jyang

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updated over 10 years ago by Andrew Beckett

1 replies • 14725 views
Discussion

**error** the memory request exceeds the current available space in hspice

Category: Custom IC Design

By sreeni

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updated over 10 years ago by Andrew Beckett

1 replies • 15097 views
Discussion

VerilogA Problem in MMSIM-7.1

Category: Custom IC Design

By gokce

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updated over 10 years ago by Andrew Beckett

36 replies • 29941 views

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