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Custom IC Design

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  • Discussion

    How to get all blocking layers touching a Pcell from inside Pcell code

    Category: Custom IC Design

    By sfiswoo

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    updated over 3 years ago by Andrew Beckett

    1 replies • 7358 views
  • Discussion

    Override a VerilogA parameters module while in tran Analysis.

    Category: Custom IC Design

    By Omar Ghazal

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    started over 3 years ago

    0 replies • 7250 views
  • Discussion

    fix RC corner

    Category: Custom IC Design

    By san2696

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    updated over 3 years ago by Andrew Beckett

    1 replies • 7613 views
  • Discussion

    Maestro expressions in yellow

    Category: Custom IC Design

    By david73

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    updated over 3 years ago by Andrew Beckett

    1 replies • 8763 views
  • Discussion

    Maximum value achieved

    Category: Custom IC Design

    By ishah

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    updated over 3 years ago by ishah

    4 replies • 9041 views
  • Discussion

    Simulation on design series

    Category: Custom IC Design

    By Martinsh

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    updated over 3 years ago by Andrew Beckett

    4 replies • 7972 views
  • Discussion

    single-sided vs double-sided noise in noise upconversion

    Category: Custom IC Design

    By StanleyChe

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    updated over 3 years ago by FormerMember

    3 replies • 9492 views
  • Discussion

    stb analysis after tran -any options required?

    Category: Custom IC Design

    By kenc184

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    updated over 3 years ago by kenc184

    2 replies • 2808 views
  • Discussion

    How to see and get rid of design variables attached to cell schematic?

    Category: Custom IC Design

    By StephanWeber

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    updated over 3 years ago by StephanWeber

    9 replies • 13221 views
  • Discussion

    Integrate IC618 with FreePDK45

    Category: Custom IC Design

    By xiangumass

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    started over 3 years ago

    0 replies • 8395 views
  • Discussion

    DC and STB analysis reuse in larger sweeps

    Category: Custom IC Design

    By jehh

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    updated over 3 years ago by jehh

    3 replies • 8329 views
  • Discussion

    Can I set the order for the statistical parameter box in MC histograms?

    Category: Custom IC Design

    By StephanWeber

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    updated over 3 years ago by Andrew Beckett

    1 replies • 7446 views
  • Discussion

    Error during snapshots launch simulator

    Category: Custom IC Design

    By blossom

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    updated over 3 years ago by Andrew Beckett

    1 replies • 7951 views
  • Discussion

    while simulating counter i got an error

    Category: Custom IC Design

    By blossom

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    updated over 3 years ago by blossom

    4 replies • 8771 views
  • Discussion

    while compiling counter program i got an error

    Category: Custom IC Design

    By blossom

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    updated over 3 years ago by blossom

    3 replies • 8349 views
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