Custom IC Design

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How to plot current results along with last run results in the same window/tab in viva.

Category: Custom IC Design

By kenc184

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updated over 3 years ago by kenc184

4 replies • 4117 views
Discussion

write *.scs file to use model library

Category: Custom IC Design

By mirtaji65

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updated over 3 years ago by mirtaji65

2 replies • 11785 views
Discussion

Stimulating an internal node from a higher hierarchy level

Category: Custom IC Design

By Johanny Saenz

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updated over 3 years ago by Andrew Beckett

5 replies • 10929 views
Discussion

Running Monte Carlo simulations on a statistical corner in ADE XL

Category: Custom IC Design

By ddsab

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updated over 3 years ago by Andrew Beckett

3 replies • 15984 views
Discussion

Joining a line between two points on the output waveform in Cadence Virtuoso calculator tool

Category: Custom IC Design

By Senan

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updated over 3 years ago by Senan

2 replies • 11043 views
Discussion

DC operating point for different analyses

Category: Custom IC Design

By Banai

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updated over 3 years ago by Banai

4 replies • 14128 views
Discussion

Parasitic extraction tools for Cadence

Category: Custom IC Design

By omiya

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updated over 3 years ago by omiya

2 replies • 11911 views
Discussion

how to add printf statement to .cdsenv file?

Category: Custom IC Design

By KurtKimber1

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updated over 3 years ago by KurtKimber1

4 replies • 10160 views
Discussion

Print Noise summary and corresponding OCEAN noiseSummary

Category: Custom IC Design

By AncisMichele

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updated over 3 years ago by AncisMichele

15 replies • 15788 views
Discussion

Can the stb simulation in Spectre calculate the negative phase margin?

Category: Custom IC Design

By zuiying

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updated over 3 years ago by zuiying

11 replies • 17712 views
Discussion

Several problems with interfacing Spectre through Matlab

Category: Custom IC Design

By FormerMember

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updated over 3 years ago by Andrew Beckett

1 replies • 5013 views
Discussion

Prevent Maestro from reporting undefined design variables

Category: Custom IC Design

By FormerMember

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updated over 3 years ago by FormerMember

3 replies • 4749 views
Discussion

5G signal sources and simulation inside Spectre / Virtuoso

Category: Custom IC Design

By sidm

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updated over 3 years ago by Andrew Beckett

11 replies • 14674 views
Discussion

DRC Error Using Assura

Category: Custom IC Design

By omiya

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updated over 3 years ago by Andrew Beckett

3 replies • 11709 views
Discussion

global pins

Category: Custom IC Design

By abdurrahman0234

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started over 3 years ago

0 replies • 8926 views

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