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Custom IC Design

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  • Discussion

    Drawing with Viva

    Category: Custom IC Design

    By BradW

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    updated over 13 years ago by Andrew Beckett

    1 replies • 15543 views
  • Discussion

    IC6.14, Issues with Hierarchy in schematics

    Category: Custom IC Design

    By Kabal

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    updated over 13 years ago by Kabal

    2 replies • 15608 views
  • Discussion

    IBM_PDK 7RF, IC6.14, Extraction of circuit

    Category: Custom IC Design

    By Kabal

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    updated over 13 years ago by Kabal

    5 replies • 14708 views
  • Discussion

    Problem with cdsdoc (version2.1) of hotfix IC 5141

    Category: Custom IC Design

    By RAO VINAY

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    •

    updated over 13 years ago by RAO VINAY

    6 replies • 15854 views
  • Discussion

    How transient operating point is calculated in cadence

    Category: Custom IC Design

    By prashu

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    •

    updated over 13 years ago by imagesensor123

    27 replies • 36160 views
  • Discussion

    mapping logical libraries in AMS Designer (VHDL)

    Category: Custom IC Design

    By FedericoPI

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    updated over 13 years ago by FedericoPI

    7 replies • 18062 views
  • Discussion

    how to simulate device noise when the circuit has chopping block

    Category: Custom IC Design

    By kunmingcai

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    •

    updated over 13 years ago by Andrew Beckett

    3 replies • 15658 views
  • Discussion

    PDK update

    Category: Custom IC Design

    By Aram Shahinyan

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    •

    updated over 13 years ago by Aram Shahinyan

    2 replies • 14767 views
  • Discussion

    Corner Analysis with IC6.1.3 and AMS HIT-Kit v4.00

    Category: Custom IC Design

    By dineshp

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    updated over 13 years ago by dineshp

    2 replies • 15454 views
  • Discussion

    Biasing technics for Diffpair(or opamp)

    Category: Custom IC Design

    By venuuuuu

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    •

    updated over 13 years ago by Quek

    1 replies • 798 views
  • Discussion

    vpwlf error: Time is not strictly increasing

    Category: Custom IC Design

    By surreyian

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    •

    updated over 13 years ago by surreyian

    6 replies • 20864 views
  • Discussion

    Illogical outputs from cadence (IC5141) ADE.

    Category: Custom IC Design

    By RAO VINAY

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    •

    updated over 13 years ago by RAO VINAY

    2 replies • 14083 views
  • Discussion

    How to Find the drawn net("MET1" "drawing") in the layout.

    Category: Custom IC Design

    By ShrikantTI

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    •

    updated over 13 years ago by Andrew Beckett

    4 replies • 2851 views
  • Discussion

    Assura LVS: Clarification on virtual connection using joinablePin() function.

    Category: Custom IC Design

    By ShrikantTI

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    •

    updated over 13 years ago by Quek

    1 replies • 15456 views
  • Discussion

    effective length variation after Monte Carlo trial

    Category: Custom IC Design

    By inessadm

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    •

    updated over 13 years ago by Andrew Beckett

    6 replies • 16154 views
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