Custom IC Design

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Source file for ELDO simulation

Category: Custom IC Design

By UUinfini

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updated over 9 years ago by Andrew Beckett

1 replies • 14020 views
Discussion

Transient simulation accuracy

Category: Custom IC Design

By ymn2009

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updated over 9 years ago by Andrew Beckett

3 replies • 16544 views
Discussion

Verilog -A amp

Category: Custom IC Design

By black tea

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updated over 9 years ago by Andrew Beckett

5 replies • 9548 views
Discussion

Problem seeing the layout content of the instances

Category: Custom IC Design

By Neo2012

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updated over 9 years ago by Andrew Beckett

3 replies • 13767 views
Discussion

capgen error

Category: Custom IC Design

By Jaganath

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updated over 9 years ago by Andrew Beckett

1 replies • 13133 views
Discussion

If-else statement in VerilogA- Designing a memory element

Category: Custom IC Design

By Nishtha Sharma

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updated over 9 years ago by Nishtha Sharma

3 replies • 2551 views
Discussion

EMIR Units

Category: Custom IC Design

By rafaelon

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updated over 9 years ago by Tom Volden

5 replies • 14793 views
Discussion

Static current calculation using Ocean script

Category: Custom IC Design

By saikatc

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updated over 9 years ago by saikatc

1 replies • 12974 views
Discussion

Trouble with ocean script for parametric analysis using ADE L

Category: Custom IC Design

By saikatc

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updated over 9 years ago by saikatc

11 replies • 17155 views
Discussion

Script Skill: copy layers in the layout view

Category: Custom IC Design

By tahm

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updated over 9 years ago by Andrew Beckett

3 replies • 15603 views
Discussion

How could I make my PV GUI communicate with Virtuoso through port so gds export has no issue

Category: Custom IC Design

By mctang

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updated over 9 years ago by mctang

4 replies • 14494 views
Discussion

Aging simulation fails in mode URI_mode: appendage

Category: Custom IC Design

By Amel

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updated over 9 years ago by Andrew Beckett

1 replies • 13462 views
Discussion

Cadence library and cell views

Category: Custom IC Design

By Pyroblast

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updated over 9 years ago by Andrew Beckett

3 replies • 17546 views
Discussion

How can I edit the purpose of Pcell'Layers

Category: Custom IC Design

By tahm

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updated over 9 years ago by Andrew Beckett

3 replies • 1502 views
Discussion

In WSP, how to align different layout instances tracks in top level

Category: Custom IC Design

By Ganesh 213

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updated over 9 years ago by Ganesh 213

2 replies • 14685 views

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