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Custom IC Design

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  • Discussion

    Assura41 ELW, VLW resize: CPU load 101%

    Category: Custom IC Design

    By LayMan LayMan

    •

    updated over 13 years ago by LayMan

    2 replies • 13297 views
  • Discussion

    Exporting DC operating point

    Category: Custom IC Design

    By mailavj mailavj

    •

    updated over 13 years ago by Andrew Beckett

    1 replies • 13375 views
  • Discussion

    Virtuoso ADEGXL: SKILL function falltime(...)

    Category: Custom IC Design

    By Eberhard2010 Eberhard2010

    •

    updated over 13 years ago by Andrew Beckett

    3 replies • 15197 views
  • Discussion

    Can not get the input noise plotted, IC6.14, MMSIM 10

    Category: Custom IC Design

    By Kabal Kabal

    •

    updated over 13 years ago by Andrew Beckett

    2 replies • 13149 views
  • Discussion

    Leakage current calculation using spectre (virtuoso)

    Category: Custom IC Design

    By Mahaboob Mahaboob

    •

    updated over 13 years ago by Andrew Beckett

    1 replies • 14245 views
  • Discussion

    Why spectre generated-netlist always show the wrong subckt name "unmos4_schematic" but not "unmos4" ?

    Category: Custom IC Design

    By Paulux Paulux

    •

    updated over 13 years ago by Andrew Beckett

    5 replies • 2541 views
  • Discussion

    Time Delay in VCVS & Delay Block in Spectre (Cadence 5) no influence

    Category: Custom IC Design

    By tstoll tstoll

    •

    updated over 13 years ago by Andrew Beckett

    2 replies • 4255 views
  • Discussion

    The resolution of sin wave

    Category: Custom IC Design

    By Medya Medya

    •

    updated over 13 years ago by Andrew Beckett

    10 replies • 19217 views
  • Discussion

    Converttime

    Category: Custom IC Design

    By Sword1983 Sword1983

    •

    updated over 13 years ago by Andrew Beckett

    1 replies • 12605 views
  • Discussion

    How to define double vias in rules file for VCAR

    Category: Custom IC Design

    By PSRK PSRK

    •

    updated over 13 years ago by Andrew Beckett

    12 replies • 19104 views
  • Discussion

    Difference between n/p –select and n/p - active layers in CMOS layout techniques.

    Category: Custom IC Design

    By RAO VINAY RAO VINAY

    •

    updated over 13 years ago by Andrew Beckett

    1 replies • 2887 views
  • Discussion

    IC5141 on RHEL5 64bit

    Category: Custom IC Design

    By pyohayo pyohayo

    •

    updated over 13 years ago by pyohayo

    6 replies • 16633 views
  • Discussion

    stubborn VXL markers

    Category: Custom IC Design

    By linbo linbo

    •

    updated over 13 years ago by Quek

    4 replies • 13821 views
  • Discussion

    Questions about OCEAN XL

    Category: Custom IC Design

    By jorankin jorankin

    •

    updated over 13 years ago by stsui

    5 replies • 15728 views
  • Discussion

    ASSURA LVS error | Custom Inductor | Pin mismatch | Unbound devices

    Category: Custom IC Design

    By pitter pitter

    •

    updated over 13 years ago by snaildr

    8 replies • 18054 views
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