Custom IC Design

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Discussion

Voltages on nets connected to pins are note saved

Category: Custom IC Design

By Aldo2

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updated over 10 years ago by Aldo2

4 replies • 13646 views
Discussion

Quirky Question - Changing the background color of the Virtuoso Schematic Editor to white

Category: Custom IC Design

By Composter

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updated over 10 years ago by Quek

4 replies • 5155 views
Discussion

To include Dim Major Dot ( dimMajorDots->value= t ) command enable at the start-up

Category: Custom IC Design

By RFStuff

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updated over 10 years ago by RFStuff

2 replies • 922 views
Discussion

rfLib tenplexer - power calculation

Category: Custom IC Design

By JorisLambrecht

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updated over 10 years ago by JorisLambrecht

1 replies • 1921 views
Discussion

Layout XL: power router pt. 2

Category: Custom IC Design

By PNadeau

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updated over 10 years ago by ColinSutlieff

6 replies • 16050 views
Discussion

Problem with GPDK090: triple well layout

Category: Custom IC Design

By jgmelo

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updated over 10 years ago by jgmelo

1 replies • 14217 views
Discussion

Model Library Setup file

Category: Custom IC Design

By mkd1007

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updated over 10 years ago by Andrew Beckett

1 replies • 15265 views
Discussion

QRC extract - parasitic resistors always scaled

Category: Custom IC Design

By RobinCommander

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updated over 10 years ago by Quek

1 replies • 1679 views
Discussion

How to import a .gds file in Virtuosos with a LAyer-Mapping table/file

Category: Custom IC Design

By RFStuff

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updated over 10 years ago by Quek

1 replies • 3782 views
Discussion

Capgen Error

Category: Custom IC Design

By TriBro85

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updated over 10 years ago by Quek

1 replies • 14465 views
Discussion

ERROR (VACOMP-1008): Cannot compile ahdlcmi module library.

Category: Custom IC Design

By zongya

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updated over 10 years ago by Quek

1 replies • 13872 views
Discussion

How to do Monte Carlo on Layout (extracted results) in cadence version 6

Category: Custom IC Design

By M Nabavi

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updated over 10 years ago by Quek

1 replies • 13871 views
Discussion

Loading Minmum layer Visible file in LSW window of Virtuoso Layout editor-IC616

Category: Custom IC Design

By RFStuff

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updated over 10 years ago by Quek

1 replies • 13630 views
Discussion

Asynchronous circuit design

Category: Custom IC Design

By MohamedMohie

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updated over 10 years ago by MohamedMohie

1 replies • 13503 views
Discussion

PID of Cadence process through lmstat

Category: Custom IC Design

By acook

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updated over 10 years ago by Andrew Beckett

6 replies • 17504 views

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