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Functional Verification

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  • Discussion

    ICCR, how to disable fullcase default branch scoring

    Category: Functional Verification

    By RyanLV

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    updated over 16 years ago by nlin

    1 replies • 14051 views
  • Discussion

    NCsim and SystemVerilog issue

    Category: Functional Verification

    By navis

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    updated over 16 years ago by tpylant

    2 replies • 14187 views
  • Discussion

    E-Planner export function error

    Category: Functional Verification

    By natg9

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    updated over 16 years ago by maama

    9 replies • 15969 views
  • Discussion

    $system : no more processes available

    Category: Functional Verification

    By outlook

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    updated over 16 years ago by StephenH

    2 replies • 15087 views
  • Discussion

    Communication between e and SV

    Category: Functional Verification

    By YM KIM

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    updated over 16 years ago by StephenH

    3 replies • 14398 views
  • Discussion

    a problem about simulation

    Category: Functional Verification

    By Nathen

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    updated over 16 years ago by themperek

    1 replies • 13881 views
  • Discussion

    ICCR union usage

    Category: Functional Verification

    By jzingman

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    updated over 16 years ago by nlin

    1 replies • 13981 views
  • Discussion

    Continue_error

    Category: Functional Verification

    By SpecMAN INFANT

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    updated over 16 years ago by MVSI

    3 replies • 14196 views
  • Discussion

    Unresolved adater ERR_DID_NOT_FIND_ADAPTER

    Category: Functional Verification

    By random

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    •

    updated over 16 years ago by random

    2 replies • 14301 views
  • Discussion

    Simulation Problem : resolving X of a un-initialized f/f whose output feedback to itself thru some logic

    Category: Functional Verification

    By iclcle

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    updated over 16 years ago by StephenH

    1 replies • 2995 views
  • Discussion

    test to write and read registers with field order like packing.low

    Category: Functional Verification

    By mkyang

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    updated over 16 years ago by StephenH

    1 replies • 13658 views
  • Discussion

    Verilog, System Verilog and SystemC

    Category: Functional Verification

    By jasonkee111

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    updated over 16 years ago by mstellfox

    3 replies • 18401 views
  • Discussion

    generate of specman (vs) randomize of systemverilog

    Category: Functional Verification

    By onkarkk

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    updated over 16 years ago by onkarkk

    4 replies • 16443 views
  • Discussion

    Simulation problem: unwanted zero-width glitch

    Category: Functional Verification

    By ridgemao

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    updated over 16 years ago by Shalom B

    3 replies • 21217 views
  • Discussion

    FSM coverage and generate block

    Category: Functional Verification

    By karlsmartin

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    •

    updated over 16 years ago by StephenH

    1 replies • 15021 views
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