Logic Design

Latest Posts

Discussion

Getting Warning X library error detected while trying to open gui for CCD

Category: Logic Design

By rgaddh
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updated over 15 years ago by croy

1 replies • 13614 views
Discussion

How do I count that how mant parts are in the library?

Category: Logic Design

By Jennie
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updated over 15 years ago by Jennie

1 replies • 13207 views
Discussion

Heterogeneous and homogeneous library part issue

Category: Logic Design

By Jennie
•
updated over 15 years ago by Jennie

1 replies • 14284 views
Discussion

Increasing the Simulation Step Time for 1 ns..?

Category: Logic Design

By Sunil Kumar K
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updated over 15 years ago by Abha

1 replies • 13184 views
Discussion

ungrouping certain hierarchies (RTLC loop issue)

Category: Logic Design

By Kamal Kundu
•
updated over 15 years ago by grasshopper

1 replies • 15316 views
Discussion

report_case_analysis in RTL Compiler

Category: Logic Design

By Kamal Kundu
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updated over 15 years ago by grasshopper

1 replies • 13265 views
Discussion

Properties editor display format

Category: Logic Design

By Jennie
•
updated over 15 years ago by Jennie

2 replies • 13347 views
Discussion

2nd TIP OF THE MONTH : Beware Incomplete Libraries

Category: Logic Design

By archive
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updated over 15 years ago by croy

2 replies • 13090 views
Discussion

altium sch. to allegro

Category: Logic Design

By jpacd1x
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started over 15 years ago

0 replies • 12666 views
Discussion

RTL design

Category: Logic Design

By JLKL
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started over 15 years ago

0 replies • 12734 views
Discussion

Square Wave oscillator output error

Category: Logic Design

By Electriconic
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updated over 15 years ago by acnetreatment

2 replies • 13688 views
Discussion

verilog . D-latch with memory.

Category: Logic Design

By dvdeepak
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updated over 15 years ago by dvdeepak

2 replies • 15769 views
Discussion

Complier error

Category: Logic Design

By jahanzebanwer
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updated over 15 years ago by tpylant

1 replies • 12982 views
Discussion

cds_thru woes in Diva LVS and DRC

Category: Logic Design

By asd1815
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started over 15 years ago

0 replies • 13060 views
Discussion

RTL compiler - eleborate issue.

Category: Logic Design

By sandeepsuhas
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updated over 15 years ago by mclarke

1 replies • 2835 views

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