Logic Design

Latest Posts

Discussion

RTL compiler - eleborate issue.

Category: Logic Design

By sandeepsuhas

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updated over 15 years ago by mclarke

1 replies • 3254 views
Discussion

lec nonequivalent on bi-di IO Pad

Category: Logic Design

By Arcade9999

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started over 15 years ago

0 replies • 14165 views
Discussion

LEC between a posedge DFF and a low-pass D latch followed by a posedge D flop

Category: Logic Design

By WorldMaker

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updated over 15 years ago by WorldMaker

1 replies • 15191 views
Discussion

memory LEC

Category: Logic Design

By WorldMaker

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updated over 15 years ago by WorldMaker

2 replies • 14608 views
Discussion

Encounter Write_sdf generate error with Modelsim

Category: Logic Design

By rv01

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updated over 15 years ago by TAM1

1 replies • 16265 views
Discussion

Part-table and bodies versions

Category: Logic Design

By DominiqueP

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started over 15 years ago

0 replies • 13661 views
Discussion

Help: memory equivalence check between RTL and schematic

Category: Logic Design

By WorldMaker

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updated over 15 years ago by archive

3 replies • 15973 views
Discussion

lec blackbox nonequivalent problem

Category: Logic Design

By Arcade9999

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updated over 15 years ago by croy

1 replies • 16817 views
Discussion

constraint file

Category: Logic Design

By my screen

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updated over 15 years ago by grasshopper

1 replies • 17491 views
Discussion

Ideal Diode Model?

Category: Logic Design

By romanjcg

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updated over 16 years ago by oldmouldy

1 replies • 16595 views
Discussion

Simulation of file .JED

Category: Logic Design

By adios

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updated over 16 years ago by adios

2 replies • 14987 views
Discussion

Constraint two path in the design to have equal propagation delay

Category: Logic Design

By diablo

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updated over 16 years ago by Genky

3 replies • 15483 views
Discussion

Synthesize problem

Category: Logic Design

By Hava

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updated over 16 years ago by tiasmith123

3 replies • 15178 views
Discussion

Viewing a .SCH file

Category: Logic Design

By Aule Mar

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updated over 16 years ago by oldmouldy

1 replies • 16153 views
Discussion

Need help with VHDL libraries in RTL Compiler

Category: Logic Design

By yqzhang

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updated over 16 years ago by Mickey

1 replies • 15342 views

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