• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

×

Welcome to the Community Recognition Program!

The Community Recognition Program is a way for Cadence to recognize community participation. By sharing your real-world expertise and broadening your knowledge, you will earn points and increase your reputation.

We encourage you to give answers as well as seek answers. You’ll both expand your skill set and help others expand theirs, and that expansion will be visible and valuable to the entire community.

So, join in. Start a conversation. Ask a question. Be the reason that a question gets solved. And last but not least, don’t forget to have fun!

learn More

Cadence Community Forums

Connect with Cadence experts and users around the globe to share ideas and best practices

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Take the Website Tour - Watch Now

CDNS Forum Categories

Browse Cadence Community Forums

Show All

OnCloud Platform

AWR Design Environment

Custom IC Design

Custom IC SKILL

PCB Design & IC Packaging (Allegro X)

System Analysis

OrCAD X

Computational Fluid Dynamics

Functional Verification

Digital Implementation

Mixed-Signal Design

Logic Design

Verification IP

RF Design

High-Level Synthesis

Implementation

PCell Designer

Functional Verification Shared Code

Hardware/Software Co-Development, Verification and Integration

RAVEL DRC Programming for IC Packaging and PCB

Community Super User Program

Want to know more? Check out this section!

Participate Now
CDNS Feature Content

Quick Links

OrCAD X—Freedom to design boldly

Unlock the Future with OrCAD X: PCB Design Simplified

Announcements

News, FAQs, and related info about how to best use the community.

Application Support and Knowledge Portal

Cadence Online Support puts the help you need within easy reach – around the clock, seven days a week

Training

Cadence helps you get the most out of your investment in our technologies through a wide range of education offerings.

Why Join?

  • Ask questions and get answers from Cadence experts
  • Share your expertise and learn from other Cadence users' experiences
  • Participate in technology- and solution-focused discussions
  • Leaderboard

    • 1
      ltoohey
      ltoohey 66 Points
    • 2
      MZ20250602835
      MZ20250602835 61 Points
    • 3
      steve
      steve 45 Points
    • 4
      Aurel B
      Aurel B 41 Points
    • 5
      Robert Finley
      Robert Finley 40 Points
  • Leaderboard

    • 1
      steve
      steve 17,774 Points
    • 2
      oldmouldy
      oldmouldy 13,705 Points
    • 3
      eDave
      eDave 10,331 Points
    • 4
      ShawnLogan
      ShawnLogan 9,710 Points
    • 5
      skillUser
      skillUser 7,508 Points
CDNS - feedback

Feedback, Suggestions, and Questions

Provide feedback on the forums or any other part of the site. Questions and suggestions welcome.

Latest Posts

  • Discussion

    Fill the unuse area with copper in panel

    Category: PCB Design

    By ENEGUE

    •

    started over 6 years ago

    0 replies • 12987 views
  • Discussion

    Spectre: TRAN results slightly differ according to which outputs are saved

    Category: Custom IC Design

    By dontpanic

    •

    updated over 6 years ago by dontpanic

    2 replies • 14304 views
  • Discussion

    Import Verilog

    Category: Custom IC Design

    By eppramod

    •

    updated over 6 years ago by Quek

    6 replies • 21159 views
  • Discussion

    nested for loop and fwrite statement

    Category: Custom IC Design

    By SatendraMaurya

    •

    updated over 6 years ago by SatendraMaurya

    4 replies • 14832 views
  • Discussion

    How to use the "set_refinement_resilience" settings after design files are updated.

    Category: Functional Verification

    By prkroon

    •

    updated over 6 years ago by prkroon

    6 replies • 9645 views
  • Discussion

    Cannot netlist config view of my testbench

    Category: Custom IC Design

    By mhkvy4

    •

    updated over 6 years ago by Andrew Beckett

    5 replies • 16800 views
  • Discussion

    MDL Autostop Using cross and freq Functions

    Category: Custom IC Design

    By baltacican87

    •

    updated over 6 years ago by baltacican87

    2 replies • 15085 views
  • Discussion

    Some Calculator Functions in MDL, Using a Variable in MDL

    Category: Custom IC Design

    By baltacican87

    •

    updated over 6 years ago by baltacican87

    2 replies • 15615 views
  • Discussion

    Triangle Symbol on Differential Pair Signals

    Category: PCB Design

    By Tmills

    •

    updated over 6 years ago by steve

    1 replies • 14826 views
  • Discussion

    Warning: ddiAddLibtoOA: Can't access library'Library name" at path "path" in OA 2.2. OA Exception is: Syntax error in .oalib file of the library

    Category: Custom IC Design

    By Anil Kumar Rajput

    •

    updated over 6 years ago by Andrew Beckett

    1 replies • 4045 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information