• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

×

Welcome to the Community Recognition Program!

The Community Recognition Program is a way for Cadence to recognize community participation. By sharing your real-world expertise and broadening your knowledge, you will earn points and increase your reputation.

We encourage you to give answers as well as seek answers. You’ll both expand your skill set and help others expand theirs, and that expansion will be visible and valuable to the entire community.

So, join in. Start a conversation. Ask a question. Be the reason that a question gets solved. And last but not least, don’t forget to have fun!

learn More

Cadence Community Forums

Connect with Cadence experts and users around the globe to share ideas and best practices

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Take the Website Tour - Watch Now

CDNS Forum Categories

Browse Cadence Community Forums

Show All

OnCloud Platform

AWR Design Environment

Custom IC Design

Custom IC SKILL

PCB Design & IC Packaging (Allegro X)

System Analysis

OrCAD X

Computational Fluid Dynamics

Functional Verification

Digital Implementation

Mixed-Signal Design

Logic Design

Verification IP

RF Design

High-Level Synthesis

Implementation

PCell Designer

Functional Verification Shared Code

Hardware/Software Co-Development, Verification and Integration

RAVEL DRC Programming for IC Packaging and PCB

Community Super User Program

Want to know more? Check out this section!

Participate Now
CDNS Feature Content

Quick Links

OrCAD X—Freedom to design boldly

Unlock the Future with OrCAD X: PCB Design Simplified

Announcements

News, FAQs, and related info about how to best use the community.

Application Support and Knowledge Portal

Cadence Online Support puts the help you need within easy reach – around the clock, seven days a week

Training

Cadence helps you get the most out of your investment in our technologies through a wide range of education offerings.

Why Join?

  • Ask questions and get answers from Cadence experts
  • Share your expertise and learn from other Cadence users' experiences
  • Participate in technology- and solution-focused discussions
  • Leaderboard

    • 1
      ltoohey
      ltoohey 66 Points
    • 2
      MZ20250602835
      MZ20250602835 62 Points
    • 3
      steve
      steve 45 Points
    • 3
      JCTEYSSIER0
      JCTEYSSIER0 45 Points
    • 5
      Robert Finley
      Robert Finley 40 Points
  • Leaderboard

    • 1
      steve
      steve 17,774 Points
    • 2
      oldmouldy
      oldmouldy 13,710 Points
    • 3
      eDave
      eDave 10,331 Points
    • 4
      ShawnLogan
      ShawnLogan 9,710 Points
    • 5
      skillUser
      skillUser 7,508 Points
CDNS - feedback

Feedback, Suggestions, and Questions

Provide feedback on the forums or any other part of the site. Questions and suggestions welcome.

Latest Posts

  • Discussion

    Limiting wire length while routing in innovus

    Category: Digital Implementation

    By ManikVSin

    •

    updated over 7 years ago by Kari

    1 replies • 15870 views
  • Discussion

    Move components / block to new page, keep annotation?

    Category: PCB Design

    By zainka

    •

    updated over 7 years ago by Lock2002

    4 replies • 14879 views
  • Discussion

    Place Bound being added automatically to symbol without one - 3D View

    Category: PCB Design

    By Sagetech

    •

    updated over 7 years ago by Lock2002

    1 replies • 1171 views
  • Discussion

    Smart value CLR feature in CIP-E database

    Category: PCB Design

    By Cantstandya

    •

    updated over 7 years ago by Cantstandya

    2 replies • 13909 views
  • Discussion

    Creating Context File

    Category: Allegro X Scripting - Skill

    By EMperson

    •

    updated over 7 years ago by eDave

    7 replies • 16946 views
  • Discussion

    Creating a output of every DRC used on a design in Allegro 16.6.

    Category: Allegro X Scripting - Skill

    By tmd63

    •

    updated over 7 years ago by eDave

    1 replies • 8869 views
  • Discussion

    probing signal in av_extracted_RC

    Category: Custom IC Design

    By HansB

    •

    updated over 7 years ago by Quek

    3 replies • 14214 views
  • Discussion

    Getting alt_symbols into existing design

    Category: PCB Design

    By aemeehan

    •

    updated over 7 years ago by excellon1

    10 replies • 17602 views
  • Discussion

    Fourier Component in Cadence Virtuoso

    Category: Mixed-Signal Design

    By growingmind

    •

    updated over 7 years ago by Dimitra Papazoglou

    1 replies • 15949 views
  • Discussion

    Concept HDL - Console Command to highlight components with a specific property value

    Category: PCB Design

    By nlman0

    •

    updated over 7 years ago by nlman0

    3 replies • 3044 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information