• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

×

Welcome to the Community Recognition Program!

The Community Recognition Program is a way for Cadence to recognize community participation. By sharing your real-world expertise and broadening your knowledge, you will earn points and increase your reputation.

We encourage you to give answers as well as seek answers. You’ll both expand your skill set and help others expand theirs, and that expansion will be visible and valuable to the entire community.

So, join in. Start a conversation. Ask a question. Be the reason that a question gets solved. And last but not least, don’t forget to have fun!

learn More

Cadence Community Forums

Connect with Cadence experts and users around the globe to share ideas and best practices

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Take the Website Tour - Watch Now

CDNS Forum Categories

Browse Cadence Community Forums

Show All

OnCloud Platform

AWR Design Environment

Custom IC Design

Custom IC SKILL

PCB Design & IC Packaging (Allegro X)

System Analysis

OrCAD X

Computational Fluid Dynamics

Functional Verification

Digital Implementation

Mixed-Signal Design

Logic Design

Verification IP

RF Design

High-Level Synthesis

Implementation

PCell Designer

Functional Verification Shared Code

Hardware/Software Co-Development, Verification and Integration

RAVEL DRC Programming for IC Packaging and PCB

Community Super User Program

Want to know more? Check out this section!

Participate Now
CDNS Feature Content

Quick Links

OrCAD X—Freedom to design boldly

Unlock the Future with OrCAD X: PCB Design Simplified

Announcements

News, FAQs, and related info about how to best use the community.

Application Support and Knowledge Portal

Cadence Online Support puts the help you need within easy reach – around the clock, seven days a week

Training

Cadence helps you get the most out of your investment in our technologies through a wide range of education offerings.

Why Join?

  • Ask questions and get answers from Cadence experts
  • Share your expertise and learn from other Cadence users' experiences
  • Participate in technology- and solution-focused discussions
  • Leaderboard

    • 1
      DavidJHutchins
      DavidJHutchins 195 Points
    • 2
      bdc66a938f164d
      bdc66a938f164d 93 Points
    • 3
      oldmouldy
      oldmouldy 80 Points
    • 4
      Aurel B
      Aurel B 77 Points
    • 5
      Elecguy
      Elecguy 75 Points
  • Leaderboard

    • 1
      steve
      steve 17,599 Points
    • 2
      oldmouldy
      oldmouldy 13,625 Points
    • 3
      eDave
      eDave 10,206 Points
    • 4
      ShawnLogan
      ShawnLogan 9,660 Points
    • 5
      skillUser
      skillUser 7,617 Points
CDNS - feedback

Feedback, Suggestions, and Questions

Provide feedback on the forums or any other part of the site. Questions and suggestions welcome.

Latest Posts

  • Discussion

    ADE-XL: How to (efficiently) sweep parameters over a "Statistical Corner"

    Category: Custom IC Design

    By dontpanic

    •

    updated over 9 years ago by dontpanic

    2 replies • 2255 views
  • Discussion

    IC6 constraining/placing matched transistors

    Category: Custom IC Design

    By stuso

    •

    updated over 9 years ago by Andrew Beckett

    12 replies • 6401 views
  • Discussion

    How do I change a cells background color without using a style

    Category: Allegro X PCB Editor

    By iCraig

    •

    updated over 9 years ago by seyerfred

    8 replies • 15908 views
  • Discussion

    OrCAD Capture 16.5 Allegro Netlist Fails (ORCAP-36003)

    Category: PCB Design

    By RalphGibson

    •

    updated over 9 years ago by RalphGibson

    13 replies • 24185 views
  • Discussion

    Generating 274-X and Lines&Text are not being included (but are included in ODB++ output)

    Category: PCB Design

    By likeabletom

    •

    updated over 9 years ago by oldmouldy

    1 replies • 583 views
  • Discussion

    Inconsistency between time and freq. domain results in pss plot

    Category: Custom IC Design

    By VLSIiitm

    •

    updated over 9 years ago by VLSIiitm

    1 replies • 14105 views
  • Discussion

    creation of symbols having many pins

    Category: PCB Design

    By true wanderer

    •

    updated over 9 years ago by true wanderer

    4 replies • 13363 views
  • Discussion

    Problems creating a mirror image of a documentation frame around a PCB.

    Category: PCB Design

    By likeabletom

    •

    updated over 9 years ago by likeabletom

    6 replies • 14512 views
  • Discussion

    ADE-XL "Saving History" very slow

    Category: Custom IC Design

    By Rob Gregoire

    •

    updated over 9 years ago by Rob Gregoire

    10 replies • 3903 views
  • Discussion

    Set UNIX environment variable through in Cadence environment through skill

    Category: Custom IC SKILL

    By rajs

    •

    updated over 9 years ago by rajs

    11 replies • 28545 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information