• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

×

Welcome to the Community Recognition Program!

The Community Recognition Program is a way for Cadence to recognize community participation. By sharing your real-world expertise and broadening your knowledge, you will earn points and increase your reputation.

We encourage you to give answers as well as seek answers. You’ll both expand your skill set and help others expand theirs, and that expansion will be visible and valuable to the entire community.

So, join in. Start a conversation. Ask a question. Be the reason that a question gets solved. And last but not least, don’t forget to have fun!

learn More

Cadence Community Forums

Connect with Cadence experts and users around the globe to share ideas and best practices

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Take the Website Tour - Watch Now

CDNS Forum Categories

Browse Cadence Community Forums

Show All

OnCloud Platform

AWR Design Environment

Custom IC Design

Custom IC SKILL

PCB Design & IC Packaging (Allegro X)

System Analysis

OrCAD X

Computational Fluid Dynamics

Functional Verification

Digital Implementation

Mixed-Signal Design

Logic Design

Verification IP

RF Design

High-Level Synthesis

Implementation

PCell Designer

Functional Verification Shared Code

Hardware/Software Co-Development, Verification and Integration

RAVEL DRC Programming for IC Packaging and PCB

Community Super User Program

Want to know more? Check out this section!

Participate Now
CDNS Feature Content

Quick Links

OrCAD X—Freedom to design boldly

Unlock the Future with OrCAD X: PCB Design Simplified

Announcements

News, FAQs, and related info about how to best use the community.

Application Support and Knowledge Portal

Cadence Online Support puts the help you need within easy reach – around the clock, seven days a week

Training

Cadence helps you get the most out of your investment in our technologies through a wide range of education offerings.

Why Join?

  • Ask questions and get answers from Cadence experts
  • Share your expertise and learn from other Cadence users' experiences
  • Participate in technology- and solution-focused discussions
  • Leaderboard

    • 1
      Charlie
      Charlie 110 Points
    • 2
      eDave
      eDave 70 Points
    • 3
      oldmouldy
      oldmouldy 55 Points
    • 4
      ShawnLogan
      ShawnLogan 50 Points
    • 5
      steve
      steve 45 Points
  • Leaderboard

    • 1
      steve
      steve 17,769 Points
    • 2
      oldmouldy
      oldmouldy 13,695 Points
    • 3
      eDave
      eDave 10,331 Points
    • 4
      ShawnLogan
      ShawnLogan 9,710 Points
    • 5
      skillUser
      skillUser 7,498 Points
CDNS - feedback

Feedback, Suggestions, and Questions

Provide feedback on the forums or any other part of the site. Questions and suggestions welcome.

Latest Posts

  • Discussion

    how to split I/O bank in BGA package

    Category: PCB Design

    By AmyZhang

    •

    started over 11 years ago

    0 replies • 400 views
  • Discussion

    How to create layout xl for user defined pcell with same parameters as in schematic??

    Category: Custom IC Design

    By KarthikJaiho

    •

    updated over 11 years ago by Andrew Beckett

    1 replies • 13852 views
  • Discussion

    Error getting while using sh command

    Category: Custom IC SKILL

    By Venu Ch

    •

    updated over 11 years ago by Andrew Beckett

    3 replies • 14791 views
  • Discussion

    Abstract Generator : 2 layouts of a same "Memory instance" identified as "Block" and "Core" why ?

    Category: Custom IC Design

    By samung

    •

    updated over 11 years ago by ColinSutlieff

    1 replies • 1158 views
  • Discussion

    Parameters not being compiled in cell characterization

    Category: Digital Implementation

    By leonardoneves

    •

    updated over 11 years ago by great ljx

    1 replies • 13948 views
  • Discussion

    encounter library character cannot run db_spice

    Category: Digital Implementation

    By great ljx

    •

    started over 11 years ago

    0 replies • 13351 views
  • Discussion

    Encounter library charaterizer could not read the hspice IBM model file

    Category: Digital Implementation

    By Satendra

    •

    updated over 11 years ago by great ljx

    3 replies • 15070 views
  • Discussion

    Warnings of Creating a Netlist

    Category: Hardware/Software Co-Development, Verification and Integration

    By Andrew2

    •

    updated over 11 years ago by Jhien

    2 replies • 15505 views
  • Discussion

    Modelling a non-linear load

    Category: PCB Design

    By nicksantos13

    •

    started over 11 years ago

    0 replies • 12933 views
  • Discussion

    Layout Plus - connect two separate designs

    Category: PCB Design

    By KrzysztofB

    •

    updated over 11 years ago by KrzysztofB

    2 replies • 1173 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information