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Forum - Thread List
  • Discussion

    Genus Synthesis not preserving register for sequential logic with pragma. Locked

    11026 views
    0 replies
    Started over 3 years ago
    by RichaV
  • Discussion

    Donut Pad with Allegro Padstack Editor

    11329 views
    2 replies
    Latest over 3 years ago
    by geda
  • Discussion

    synthesizing Verilog code in Cadence Virtuoso Locked

    11039 views
    2 replies
    Latest over 3 years ago
    by Senan
  • Discussion

    Issue with simulating Verilog Functional view Locked

    10166 views
    2 replies
    Latest over 3 years ago
    by AmarDas
  • Not Answered

    Port De-Embedding in Clarity3DLayout & Clarity 3DWorkbench 0

    2281 views
    1 reply
    Latest over 3 years ago
    by groverborme
  • Suggested Answer

    Box around SubCircuits 0

    7901 views
    1 reply
    Latest over 3 years ago
    by Diego cmre
  • Discussion

    "Direction" of EEnet connection points? Locked

    2530 views
    1 reply
    Latest over 3 years ago
    by drdanmc
  • Not Answered

    Problem with "Unused pad suppression" and plane connection 0

    4091 views
    3 replies
    Latest over 3 years ago
    by steve
  • Discussion

    Sigrity – Tip of the week: Creation of layer Stackup in XcitePI tool

    7074 views
    0 replies
    Started over 3 years ago
    by SimTech
  • Discussion

    Cellview generation from VHDL code in cadence 618 Locked

    11414 views
    5 replies
    Latest over 3 years ago
    by rovin
  • Not Answered

    Vias in Hatched copper fills 0

    9038 views
    1 reply
    Latest over 3 years ago
    by RFinley
  • Discussion

    .csv output in spectre Locked

    13450 views
    11 replies
    Latest over 3 years ago
    by HTTb
  • Discussion

    How can I define global parameters to use in different expressions in my design?

    10526 views
    0 replies
    Started over 3 years ago
    by DesignTech
  • Discussion

    SysCap – Tip of the Week: Modifying Hierarchical Block Symbols

    7283 views
    0 replies
    Started over 3 years ago
    by DesignTech
  • Discussion

    How to modify variable in simrc Locked

    9339 views
    0 replies
    Started over 3 years ago
    by TonyTang
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