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Latest Blog Posts

  • Learning and Support: Cadence Support Portal – Enhancements Released in July, 2017

    Sachin Nagpal
    Sachin Nagpal

    Do you access Cadence Support Portal (https://support.cadence.com) often?

    If yes, you may be interested to know what has been happening to the site lately. There have been many enhancements and changes!

    If you have not visited us recently, you may be...

    • 14 Aug 2017
  • Breakfast Bytes: Dolphins? In Milpitas? It's EDPS Time

    Paul McLellan
    Paul McLellan

     breakfast bytes logoedps dolphin logoYes, it's true. After who knows how many years, EDPS is not going to be in Monterey, but in Milpitas. They still seem to be keeping the dolphin logo though. So, yes, dolphins in Milpitas.

    EDPS is the Electronic Design Process Symposium. It is a relatively...

    • 14 Aug 2017
  • Analog/Custom Design: The Art of Analog Design Part 2: Monte Carlo Sampling

    Art3
    Art3

    Historically, one of the great challenges that analog and mixed-designers face has been accounting for the effect of process variation on their design. Minimizing the effect of process variation is an important consideration because it directly impacts the cost of a design. From Pelgrom’s Law (1), it is understood that the device mismatch due to process variation decreases as the square root of increasing device area…

    • 12 Aug 2017
  • System, PCB, & Package Design : Customer Support Recommends – Rigid-Flex in Allegro PCB Editor 17.2

    Amardeep
    Amardeep

    Cadence Online Support has this Rapid Adoption Kit (RAK) on Rigid-Flex in Allegro PCB Editor 17.2 that introduces a flow to define unique stackups by physical zone. The Cross Section Editor in 17.2 has been enhanced to support multiple stackup definitions including support for mask and coating layers. The primary driver for this enhancement is Rigid- Flex applications where it’s common to have different fabrics across…

    • 11 Aug 2017
  • Breakfast Bytes: British Computer Museums

    Paul McLellan
    Paul McLellan

     breakfast bytes logoironbridgeThis week we move to Britain. The industrial revolution started in the Midlands there, and I highly recommend visiting Blists Hills Museum (near Ironbridge which is the first...you'll never guess...iron bridge, from 1779). This is truly the cradle of...

    • 11 Aug 2017
  • Verification: Save & Restore with More: Preserve Your Entire SoC

    XTeam
    XTeam

    The concept of Save and Restore is simple: instead of re-initializing your simulation every time you want to run a test, only initialize it once. Then you can save the simulation as a “snapshot” and re-run it from that point to avoid hours of initialization times. It used to be inconvenient. Using this feature in simulators could have massive productivity gains, but not all users made the most of it due to…

    • 10 Aug 2017
  • Breakfast Bytes: I Know What the SDI in Samsung SDI Stands For, and You Won't Believe It

    Paul McLellan
    Paul McLellan

     breakfast bytes logo

    How's that for click bait? But it's actually true.I didn't know what the SDI of Samsung SDI actually stood for. So I tried to discover. It is harder than you think to find out, partially because the answer is a bit too cute, and so I guess they stopped...

    • 10 Aug 2017
  • Analog/Custom Design: The Art of Analog Design Part 1: Overview of Variation-Aware and Robust Design

    Art3
    Art3

    In this series, we will focus on advanced concepts for custom IC design, in particular, variation-aware design (VAD). With emergence of high-speed simulators such as Spectre® APS, designers can now run simulations faster than ever before, so they are able to more completely verify their designs before taping out. However, it requires more than verifying the proper functionality for different stimulus and performance…

    • 10 Aug 2017
  • Analog/Custom Design: Virtuoso Video Diary: Comparing Waveform Outputs of Analog Simulations

    NamrataM
    NamrataM

    Comparing waveform outputs of a simulation run with the outputs of a “golden“ or any other “previous“ run is one of the regular tasks that analog designers perform while tuning their designs to meet the requirements. At times, it requires performing multiple iterations of several tasks, such as running simulations and comparing results, making changes in the comparison criteria, checking whether the expectations are…

    • 9 Aug 2017
  • Breakfast Bytes: Moving Logic to the 3rd Dimension

    Paul McLellan
    Paul McLellan

     breakfast bytes logoSo the new Doctor Who will be a woman. Who(!) would have guessed?

    As it happens, I saw the very first episode of Dr Who (in B&W). Because of a macabre coincidence, I can even tell you the date. It appeared the day following President Kennedy's assassination...

    • 9 Aug 2017
  • Breakfast Bytes: What's For Breakfast? Video Preview August 14th to 18th 2017

    Paul McLellan
    Paul McLellan

    https://youtu.be/npWqpbJDMIA

     breakfast bytes logo

    Coming from Stirling Castle, Scotland (camera Carey Guo)

    Monday: Dolphins? In Milpitas? It's EDPS Time

    Tuesday: Automotive Development Used to End with SOP

    Wednesday: There's More Voice in Your Future

    Thursday...

    • 8 Aug 2017
  • Verification: Infineon’s Coverage-Driven Distribution: Shortcutting the MDV Loop

    XTeam
    XTeam

    There are more ways to improve productivity in the verification process than simply making the simulation run faster. One of these is to cut down on the amount of time engineers spend working hands-on with the testbench itself, preparing it and coding Specman/e tests for it. It is common knowledge that the engineer’s task is to stock the testbench with these tests and rerun regressions to measure their effect as they…

    • 8 Aug 2017
  • The India Circuit: Welcome to The India Circuit!

    Madhavi Rao
    Madhavi Rao

    Welcome to this, the first blog on The India Circuit (which, as someone cleverly pointed out, can be shortened to “The IC”)! The India Circuit will be about the Indian Electronics System Design & Manufacturing (ESDM) ecosystem.

     Are you...

    • 8 Aug 2017
  • Breakfast Bytes: Battery Derangement Syndrome

    Paul McLellan
    Paul McLellan

     breakfast bytes logo I have written a fair bit recently about electric cars and electric trucks. Note that I'm not talking about autonomous driving, although some of the ADAS technologies are coming along at the same time. The assumption tends to be that the limiting factor...

    • 8 Aug 2017
  • The India Circuit: Beyond Robots and Jetpacks at the Society of Women Engineers Conference in Pune

    Madhavi Rao
    Madhavi Rao

     This event happened a while ago, but I thought it was still topical enough to blog about since there aren’t many events that focus on women engineers. The Grace Hopper Conference is one, and the Society of Women Engineers’ annual conference, called WE...

    • 7 Aug 2017
  • Analog/Custom Design: Virtuosity: Loading Complete 'Routing Recipes' with a Single Click

    Parula
    Parula

    Have you checked out the new VSR Preset feature and the related forms in the IC6.1.7 and ICADV12.3 releases? We all have heard how automatic routing has significantly reduced the turnaround time for layout designers. VSR Preset is a bonus from Cadence to further reduce the time required. It is a "Jewel in the Crown" of Automatic Routing.

    What is a VSR Preset?

    A VSR preset is a simple and user-friendly mechanism…

    • 7 Aug 2017
  • Breakfast Bytes: Discovery of the Electron

    Paul McLellan
    Paul McLellan

     breakfast bytes logojj thomson discovery of the electronToday is the 120th anniversary of the discovery of the electron by J.J. Thomson in 1897, for which he received the Nobel prize in 1906. The results were published in Philosophical Magazine 44 (269): pages 293–316. I don't know the precise date of publication...

    • 7 Aug 2017
  • Verification: How to Model State Machines in the Accellera Portable Stimulus Standard for Low Power SoC Verification

    Steve Brown
    Steve Brown
    The Accellera Portable Stimulus Standard (PSS) is experiencing growing customer interest, and generating a host of questions. In this blog Sharon Rosenberg details the modeling of state machines using the PSS in order to perform low power SoC verific...
    • 4 Aug 2017
  • Breakfast Bytes: Computer History Museum History

    Paul McLellan
    Paul McLellan

     breakfast bytes logo

    The Computer History Museum (CHM) is on Shoreline Boulevard in Mountain View in one of the buildings that used to make up the SGI campus back when they were the major force in graphics. Most of the rest of the buildings are now part of the Googleplex...

    • 4 Aug 2017
  • Analog/Custom Design: Virtuosity: The New Virtuoso ADE Product Suite - Knowledge Resource Kit

    Ashu V
    Ashu V

    Cadence introduced its new set of Virtuoso® ADE products, which includes Virtuoso ADE Explorer, Virtuoso ADE Assembler, Virtuoso Variation Option, and Virtuoso ADE Verifier, in the IC6.1.7 and ICADV12.3 releases. It’s really exciting to mention that this next-generation ADE product suite has been well-received by customers all across the globe. This product suite also won the prestigious Product of the Year award…

    • 3 Aug 2017
  • Breakfast Bytes: O Lord, Won't You Buy Me a Mercedes Benz...Truck

    Paul McLellan
    Paul McLellan

     breakfast bytes logoYou hear a lot of talk about autonomous cars, but I've also heard many times that autonomous trucks may well be first. If it costs a fixed amount to make a vehicle autonomous, then it is much easier to absorb that cost into a $150,000 truck than a $20...

    • 3 Aug 2017
  • Breakfast Bytes: An Academic View on How Tesla Will Not Win

    Paul McLellan
    Paul McLellan

     breakfast bytes logoProfessor Markus Lienkamp, of Technische Universität München (roughly the MIT of Germany) was the only academic who presented at the Automotiv Elektronik Kongress in Ludwigsburg. His presentation was The Status of Electromobility in 2017, or How...

    • 2 Aug 2017
  • Whiteboard Wednesdays: Whiteboard Wednesdays - Introduction to Cadence USB Type-C VIP

    References4U
    References4U

    In this week's Whiteboard Wednesdays video, Asila Nahas describes the USB Type-C VIP and goes over the multiple designs the VIP can be used to verify.

    https://youtu.be/nuNZIrnchc0

    • 1 Aug 2017
  • Breakfast Bytes: BROADPWN: Attacking Smartphones through the Wi-Fi Chip

    Paul McLellan
    Paul McLellan

     breakfast bytes logoDo you have an iPhone? Did it suddenly update IoS at the end of last week? That's because of a vulnerability discovered by a researcher, Nitay Arenstein, in the Broadcom Wi-Fi chip. Since lots of phones, not just iPhone, use this same chip, the vulnerability...

    • 1 Aug 2017
  • Breakfast Bytes: What's For Breakfast? Video Preview August 7th to 11th 2017

    Paul McLellan
    Paul McLellan

    https://youtu.be/uIodpPVnsXM

     breakfast bytes logo

    Coming from Cadence cafeteria patio (camera Sean)

    Monday: Discovery of the Electron

    Tuesday: Battery Derangement Syndrome

    Wednesday: Moving Logic to the 3rd Dimension

    Thursday: I Know What the SDI in Samsung SDI Stands...

    • 31 Jul 2017
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