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On Tuesday, Cadence hosted a lunch focused on 7nm digital design and signoff. Jim Hogan was the moderator. The panel got to debate 7nm while everyone else got to eat lunch.

For more details on 7nm, seem my post TSMC @ N7 with Cadence. In particular,...

In this week's Whiteboard Wednesdays video, Tom Hackett explains five unique advantages of the Cadence IP solution. These advantages enable on-time delivery of high-quality IP and system expertise that enables our customers to create highly differentiated and market-leading SoCs.

https://youtu.be/rCkmvERdCRo

Professor Wei Shaojun of Tsinghua University presented on China's IC Industry: Today and Tomorrow. As you probably know, in 2014 China announced plans to promote the development of the IC industry in China. One big reason for this is that China imports...

Monday was Lip-Bu's turn for a chat with Ed Sperling. The same event last year was billed as a "fireside chat" but was postponed for 15 minutes when a spotlight really did catch fire. Taking no chances, this year it was re-branded as a one-on-one chat...

The opening keynote of DAC was by Joe Costello. Joe, of course, was the first CEO of Cadence (created when SDA was merged into ECAD) and held that position for over a decade. Over ten years ago, he gave a keynote at DAC and gave his rules for bringing...

Over a year ago when the new Virtuoso ADE product suite was released, we had our fingers crossed. Today, we feel immense pleasure to mention that the new Virtuoso ADE product suite is well-received by the ADE customers and has been getting appreciation across geographies. It's now evident that the newer products– Virtuoso ADE Explorer, Virtuoso  ADE Assembler, Virtuoso Variation Option, and Virtuoso ADE Veri…

Yesterday was Wednesday at DAC here in Austin. For reports on the last three days, see:

• Guide to Austin for Newbies, and DAC Sunday Kickoff
• DAC Monday 2017: Joe, Lip-Bu, China, Under 40s, Smurfs, and More
• DAC Tuesday 2017: Siemens, SiP, Simon & Lucio...

https://youtu.be/qE5sgFfGeIg

Coming from the 54th Design Automation Conference in Austin (camera Sean)

Monday: One on One With Lip-Bu Tan

Tuesday: The Chinese Semiconductor Industry

Wednesday: 7nm Lunch

Thursday: Silicon in Package (SiP)

Friday...

Yesterday was Tuesday at DAC here in Austin. For reports on the last couple of days see Guide to Austin for Newbies, and DAC Sunday Kickoff and DAC Monday 2017: Joe, Lip-Bu, China, Under 40s, Smurfs, and More.

It's Monday, the first real day of DAC after the kickoff on Sunday evening. See Guide to Austin for Newbies, and DAC Sunday Kickoff for more details of yesterday.

In his introduction, Mike "Mac" McNamara put up a slide with some notable...

Cadence returns to DAC 2017 this year, showcasing our full verification suite. Here are some of the things you can look forward to from us in the upcoming week.

Once again, Cadence has the Expert Bar on Monday, Tuesday, and Wednesday. The Expert Bar is where engineers can visit our booth and have conversations with our technical experts. Cadence will be running many sessions, and those topics are listed below.

Sean O'Kane and I wandered around the show floor during setup on Sunday and looked at how the show is shaping up.

https://youtu.be/qDjKQ8lXGR4

This is my first post from DAC. I will be posting each day about the most interesting stuff that I saw the day before, except for the events that I feel justify their own post next week. Since it is Monday, and not much happened on Sunday (I didn't attend...

If you have been watching my "What's for Breakfast?" weekly video previews, then you will notice that I've been traveling a bit recently. The most recent videos were from Chicago, the moon, Shanghai, Munich, Mexico City, and beer pong...

“Any sufficiently advanced technology is indistinguishable from magic.”
― Arthur C. Clarke, Profiles of the Future: An Inquiry Into the Limits of the Possible

Virtuoso System Design Platform functionality is no less than a magic for an IC designer for whom the weeks of effort gets reduced to just few minutes! Virtuoso System Design Platform brings together the Virtuoso® and Allegro®/Sigrity™ platforms seamlessly…

Cadence Academic Network (CAN) hosted a Cadence Research Workshop in Duke Kunshan University on June 1^st, 2017. This Research Workshop was co-chaired by Cadence and Professor Xin Li, Department of Electrical and Computer Engineering at Duke University...

If you live in the Bay Area, you have almost certainly heard KQED's Forum program, at least occasionally. It is on every weekday from 9-11am, hosted for over 25 years by Michael Krasny. It is also available, delayed a few days, as a podcast. Of course...

Cadence Rapid Adoption Kits (RAKs) are designed to help users quickly adopt new technologies into their flows and boost their productivity. Keeping this in mind, RAKs to help you understand the following features are now available on Cadence Online Support:

• Modgen On Canvas
• Row-Based Placement

The Modgen On Canvas commands were introduced in the IC6.1.7 ISR8 and ICADV12.3 base releases. These…

This is the third post on the second Samsung Foundry Day held recently. The first was Samsung Foundry Forum: Roadmaps. The second was Samsung Foundry Forum: EUV.

In the first post I wrote about the rest of the Samsung...

In this week's Whiteboard Wednesdays video, Tom Hackett explains the 3 forces driving SoC design teams to integrate off-the-shelf interface IP from commercial vendors rather than design the IP themselves.

https://youtu.be/demOFwbSb6k

https://youtu.be/QtKiDx9yXAY

Coming from the Staten Island Ferry NY (camera Sam McLellan)

Monday: Introduction to Austin and DAC Sunday Review

Tuesday: Review of DAC Monday

Wednesday: Review of DAC Tuesday

Thursday: Review of DAC Wednesday

Friday...

This is the second post on the second Samsung Foundry Day held recently. The first was Samsung Foundry Forum: Roadmaps. This post is all about EUV. Since all EUV scanners are supplied by ASML, most of what one manufacturer says applies to all of them...