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After leaving the title of yesterday's post in German, the obvious place to go for the next stop on the summer of computer museums is Germany.

If you ask people which was the first digital computer, the answer tends to vary with the respondent...

Fehlerkultur is apparently untranslatable into English, at least according to Michael Würtenburger, the head of BMW car IT. His best try was "no-blame organization." His theme echoed many other presenters during the two days, that the automotive industry...

https://youtu.be/IE1B-CmmtSs

Coming from Cadence building 10 patio (camera Paula Jones)

Monday: Linley Group Looks at the IoT Market

Tuesday: SEMICON China Panel

Wednesday: Integrated Virtual Dummy Metal Fill

Thursday: Dare to be Different

Friday...

The use of silicon photonics allows semiconductor designers to leverage the billions of dollars invested in existing manufacturing facilities, integrating electronics and optical on the same die or in the same package. Breakfast Byte’s blogger Paul McLellan has written quite a few excellent blogs about Silicon Photonics. In one …

Hefty books give many people shivers, especially in the tech world. ‘Table of Contents’ often comes to rescue and lets the learner scroll to a topic of interest. However, going through many and various chapters to learn one specific item is tedious and...

Rich Kennewick gave the keynote on the second day of the Linley IoT Hardware Conference recently. He is the CEO of a company called Voicebox and his keynote was Enabling Voice in the IoT. I had not heard of Voicebox and that is because they don't sell...

There has been a lot of news lately about manufacturing under the “Make In India” banner. In the last ten days alone, the Kalyani Group has announced the country’s first-ever private missile subsystems manufacturing facility in partnership...

In this week’s Whiteboard Wednesdays video Gerard Andrews discusses the three areas of smart speakers that require high-performance audio DSPs to process these features.

https://youtu.be/sf6_bFuyLi0

Back in about 2001, when I was last working for Cadence, Cadence started bringing in a lot of executives from Intel. We had merged custom IC and digital IC engineering and I was running the merged marketing groups. We had a lot of customer commitments...

Do you access Cadence Support Portal (https://support.cadence.com) often?

If yes, you may be interested to know what has been happening to the site lately. There have been many enhancements and changes!

If you have not visited us recently, you may be...

Yes, it's true. After who knows how many years, EDPS is not going to be in Monterey, but in Milpitas. They still seem to be keeping the dolphin logo though. So, yes, dolphins in Milpitas.

EDPS is the Electronic Design Process Symposium. It is a relatively...

Historically, one of the great challenges that analog and mixed-designers face has been accounting for the effect of process variation on their design. Minimizing the effect of process variation is an important consideration because it directly impacts the cost of a design. From Pelgrom’s Law (1), it is understood that the device mismatch due to process variation decreases as the square root of increasing device area…

Cadence Online Support has this Rapid Adoption Kit (RAK) on Rigid-Flex in Allegro PCB Editor 17.2 that introduces a flow to define unique stackups by physical zone. The Cross Section Editor in 17.2 has been enhanced to support multiple stackup definitions including support for mask and coating layers. The primary driver for this enhancement is Rigid- Flex applications where it’s common to have different fabrics across…

This week we move to Britain. The industrial revolution started in the Midlands there, and I highly recommend visiting Blists Hills Museum (near Ironbridge which is the first...you'll never guess...iron bridge, from 1779). This is truly the cradle of...

The concept of Save and Restore is simple: instead of re-initializing your simulation every time you want to run a test, only initialize it once. Then you can save the simulation as a “snapshot” and re-run it from that point to avoid hours of initialization times. It used to be inconvenient. Using this feature in simulators could have massive productivity gains, but not all users made the most of it due to…

How's that for click bait? But it's actually true.I didn't know what the SDI of Samsung SDI actually stood for. So I tried to discover. It is harder than you think to find out, partially because the answer is a bit too cute, and so I guess they stopped...

In this series, we will focus on advanced concepts for custom IC design, in particular, variation-aware design (VAD). With emergence of high-speed simulators such as Spectre^® APS, designers can now run simulations faster than ever before, so they are able to more completely verify their designs before taping out. However, it requires more than verifying the proper functionality for different stimulus and performance…

Comparing waveform outputs of a simulation run with the outputs of a “golden“ or any other “previous“ run is one of the regular tasks that analog designers perform while tuning their designs to meet the requirements. At times, it requires performing multiple iterations of several tasks, such as running simulations and comparing results, making changes in the comparison criteria, checking whether the expectations are…

So the new Doctor Who will be a woman. Who(!) would have guessed?

As it happens, I saw the very first episode of Dr Who (in B&W). Because of a macabre coincidence, I can even tell you the date. It appeared the day following President Kennedy's assassination...

https://youtu.be/npWqpbJDMIA

Coming from Stirling Castle, Scotland (camera Carey Guo)

Monday: Dolphins? In Milpitas? It's EDPS Time

Tuesday: Automotive Development Used to End with SOP

Wednesday: There's More Voice in Your Future

Thursday...

There are more ways to improve productivity in the verification process than simply making the simulation run faster. One of these is to cut down on the amount of time engineers spend working hands-on with the testbench itself, preparing it and coding Specman/e tests for it. It is common knowledge that the engineer’s task is to stock the testbench with these tests and rerun regressions to measure their effect as they…

Welcome to this, the first blog on The India Circuit (which, as someone cleverly pointed out, can be shortened to “The IC”)! The India Circuit will be about the Indian Electronics System Design & Manufacturing (ESDM) ecosystem.

Are you...

I have written a fair bit recently about electric cars and electric trucks. Note that I'm not talking about autonomous driving, although some of the ADAS technologies are coming along at the same time. The assumption tends to be that the limiting factor...

This event happened a while ago, but I thought it was still topical enough to blog about since there aren’t many events that focus on women engineers. The Grace Hopper Conference is one, and the Society of Women Engineers’ annual conference, called WE...

Have you checked out the new VSR Preset feature and the related forms in the IC6.1.7 and ICADV12.3 releases? We all have heard how automatic routing has significantly reduced the turnaround time for layout designers. VSR Preset is a bonus from Cadence to further reduce the time required. It is a "Jewel in the Crown" of Automatic Routing.

A VSR preset is a simple and user-friendly mechanism…