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Breakfast Bytes: Application Engineers Are Like Gold

Paul McLellan

I wrote recently about my experiences Running a Salesforce, and one of the key aspects of marketing in City Slickers Marketing. Today, it is time for my thoughts on application engineering. Application Engineers Application engineers are the unsung ...
- 9 Feb 2018
Analog/Custom Design: Virtuoso Video Diary: Stranded Wire – A New Sapling in Interactive Routing

Parula

In order to drive high current and to minimize routing resistivity, it is desirable to draw wide wires. But, in mature nodes, maximum width or maximum density constraints on some metal layers prevent the designers to create wide wires. Another challenge when working with designs at advanced nodes less than 22nm is that it is only possible to route with wires at minimum width. This leads to situations where the current density…
- 9 Feb 2018
System, PCB, & Package Design : SI Methodology for Multi-Gigabit Serial Link Interfaces (6 of 8)

Sigrity

Simulating with IBIS-AMI Models By this point in the process, the SerDes component suppliers should have provided any missing IBIS-AMI models, which should be updated in your simulation testbench if they exist and are available. Now the focus shifts ...
- 8 Feb 2018
Breakfast Bytes: Warsaw to Canary Islands to Madrid to Staten Island to California: Michal's Journey

Paul McLellan

Some people grow up in the US, go to high school, get into a good engineering or computer science program, graduate, and end up in Cadence. Other people take a rather more indirect route. Michal Siwinski has quite a story as to how he got from growin...
- 8 Feb 2018
Breakfast Bytes: What's For Breakfast? Video Preview February 12th to 16th 2018

Paul McLellan

https://youtu.be/wwioFa3JGuc Coming from the Cadence basketball court (camera Sean) Monday: Advanced Packaging Needs Advanced Tools Tuesday: 9 Years to Pluto, No Go-Arounds Wednesday: What Happens in a Patent Lawsuit Thursday:&nb...
- 7 Feb 2018
Breakfast Bytes: Oz and Ziyad Look to the Future of JasperGold

Paul McLellan

At last year's Jasper User Group, the two-day event was opened by Oz Levia, VP of VIP and Formal Solutions. Oz said that it was the 10th Jasper User Group, the fourth since Jasper was acquired by Cadence (I worked for Semiwiki back then and Jasper wa...
- 7 Feb 2018
Whiteboard Wednesdays: Whiteboard Wednesdays - Dual Channel DIMMs for Server Applications

References4U

In this week's Whiteboard Wednesdays video, Kishore Kasamsetty, discusses how future server memory standards are expected to implement dual channel DIMM. Learn about how dual channel DIMMs work and what the implications are for PHY and controller IP that need to support both single and dual channel DIMM.

https://youtu.be/vilUDNv8vcI
- 6 Feb 2018
Analog/Custom Design: Integrating AMS IP in SoC Verification Just Got Easier

msteam

Typically, analog designers verify their AMS IP in schematic driven, interactive environment, while SoC designers use a UVM SystemVerilog testbench ran from a command line. In our last MS blog, we talked about automation for reusing SystemVerilog testbench by analog designers in order to verify AMS IP in exactly same context as in its SoC integration, hence reducing surprises and unnecessary iterations.

But, what about…
- 6 Feb 2018
Breakfast Bytes: Fooling Neural Networks

Paul McLellan

I wrote recently about various aspects of modeling, not just transistor models, but also deer and climate change. One of the things that I mentioned in passing was over-training. This is where the model is made so accurate, often by adding additional...
- 6 Feb 2018
Breakfast Bytes: The Old Order Changeth: Samsung Takes the Crown

Paul McLellan

The most famous line of Tennyson's poem Morte D'Arthur is "The old order passeth, yielding place to new." It is often quoted when a new king, real or metaphorical, is crowned. Last week, Intel and Samsung announced their financial ...
- 5 Feb 2018
Analog/Custom Design: Virtuosity: Sharing Custom SKILL Calculator Functions

Arja H

Have you ever written a fantastic piece of SKILL to carry out a calculation and wanted to tell the world about it? Or maybe you really need a calculator function to perform a calculation but Cadence does not supply that function with the Calculator or Expression Builder? We have a new Custom IC Calculator SKILL Function Library where you can visit and download custom SKILL scripts and upload any of your own that you…
- 2 Feb 2018
Breakfast Bytes: DesignCon: PCB and Packaging Take Center Stage

Paul McLellan

You wouldn't really know it from the name, but DesignCon is all about the design and analysis of printed circuit boards and packages. It's an exaggeration to say that IC design is never mentioned, but this is one of the premier conferences for the de...
- 2 Feb 2018
Verification: New AMBA 5 ACE/AXI Specification: Rationale for Atomic Transactions

DimitryP

The recent update of the AMBA® 5 ACE/AXI specification introduces a number of significant performance improvements which help to align the protocol to the more recent AMBA® 5 CHI (Coherent Hub Interface) specification. One of the most prominent features is introduction of atomic transactions. Before we take a close look at this new class of transactions, let’s look back in time.

Previous generations of AMBA…
- 1 Feb 2018
Breakfast Bytes: DesignCon: SI, PI and EMI Have a Threesome

Paul McLellan

DesignCon 2018 opened with a keynote panel on the subject of SI, PI, and EMI Challenges Looking Ahead Through 2023. The initials are for signal integrity, power integrity, and electro-magnetic interference. Istvan Novak pointed out Amara's Law, t...
- 1 Feb 2018
SoC and IP: You Won't Believe Your Ears When Listening to Your Laptop

PaulaJones

I wouldn't believe it if I hadn't heard it myself on a laptop in the Cadence booth at the Consumer Electronics Show (CES) this year. Through a great innovation by our partner Dolby, you can now get surround sound on your laptop!

You’ve probably been in a movie theater with Dolby’s latest innovation—Dolby Atmos. And maybe you’ve purchased a television in the last year with Dolby Atmos (it was…
- 31 Jan 2018
Breakfast Bytes: Open-Source IP in Government Electronics

Paul McLellan

At the RISC-V conference late last year, one of the keynotes was by Linton Salmon titled A Perspective on the Role of Open-Source IP in Government Electronic Systems. It was not specifically about RISC-V, although the RISC-V ISA and many of the imple...
- 31 Jan 2018
Whiteboard Wednesdays: Whiteboard Wednesdays - LPDDR4X DRAM: Performance and Power Efficiency Improvements Over LPDDR4

References4U

In this week's Whiteboard Wednesdays video, Kishore Kasamsetty will help you learn more about how LPDDR4X can cut down a significant amount of DRAM and SoC PHY power with the use of a 0.6V VDDQ signaling level. LPDDR4X is also available in the highest performance timing bins- 4266 Mbps. Silicon proven LPDDR4X IP in many popular nodes is available from cadence making it ideal for applications requiring high bandwidth with…
- 30 Jan 2018
Breakfast Bytes: All Models Are Wrong; Some Are Useful

Paul McLellan

"All models are wrong, some are useful.” This remark is attributed to the statistician George Box who used it as the section heading in a paper published in 1976. Anyway, George Box went on to clarify what he meant Now it would be very re...
- 30 Jan 2018
Verification: JEDEC UFS 3.0 Now Available in Cadence VIP Portfolio – For Mobile and Automotive Markets

Thierry Berdah

The JEDEC UFS (Universal Flash Storage) started in 2011 with the v1.0 first specification version, supporting a bandwidth of 300 MB/s per lane. Since then JEDEC has been continuously releasing new UFS specification versions on top of the MIPI UniPro® and MIPI MPHY® evolving specs. UFS is now evolving to a new version of 3.0, reaching a total bandwidth of 2.4 GB/s. It seems that UFS keeps on slowly winning over eMMC in…
- 29 Jan 2018
Breakfast Bytes: TSMC 30 Years Ago Today

Paul McLellan

At IEDM in December, Gary Dagastine is one of the people responsible for press relations for the conference. My piece about Chips and Technologies, the First Fabless Company reminded him that back in that time, he did some work with Jim Dyk...
- 28 Jan 2018
The India Circuit: The Promise Of Digital India

Madhavi Rao

By 2019, it is estimated that there will be five billion mobile phone users in the world, with around 67% of the world’s population owning a mobile phone, according to the website Statista. In India, Statista says that by 2019 there will ...
- 28 Jan 2018
Breakfast Bytes: City Slickers Marketing

Paul McLellan

Last week I talked about sales in Running a Salesforce. This week it is the turn of marketing. Let me start by pointing out that marketing is a lot more than PR, which is what many technical people seem to imagine. When I did marketing consulting, It...
- 26 Jan 2018
Whiteboard Wednesdays: Whiteboard Wednesdays - Verification Challenges for SoCs Integrating CCIX Interface IP

References4U

In this week's Whiteboard Wednesdays episode, Nick Heaton, Distinguished Engineer, Cadence, describes the verification challenges for SoCs when integrating CCIX (Cache Coherent Chip-to-Chip Protocol) IP.

https://youtu.be/XJo0FieHEYc
- 25 Jan 2018
Computational Fluid Dynamics: Morrelli & Melvin: Making Waves in the Marine Industry with Numeca for Hydrofoil Design

AnneMarie CFD

Numeca USA customer Morrelli & Melvin has been busy using FINE/Marine for various CFD design optimization projects in the marine industry for the past two and a half years. “We’ve been using FINE/Marine in the desi...
- 25 Jan 2018
Computational Fluid Dynamics: Morrelli & Melvin: Making Waves in the Marine Industry with Numeca for Hydrofoil Design

Tanushri Shah

Numeca USA customer Morrelli & Melvin has been busy using FINE /Marine for various CFD design optimization projects in the marine industry for the past two and a half years. “We’ve been using FINE /Marine in the de...
- 25 Jan 2018

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