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Why is image processing so important? To a first order approximation, all data is vision and video. Of course, things like GPS systems generate data too, but in terms of data volume the amount of data is trivial and the complexity of its processing is...

In days of future past, we looked at DC mismatch analysis and compared it to Monte Carlo analysis for analyzing the effect of device mismatch on the offset voltage of a differential amplifier. We found that DC mismatch does provide good estimates of the effect of mismatch with the limitation that the offset voltage has a Gaussian distribution. Since DC mismatch analysis only needed a single simulation to generate an estimate…

https://youtu.be/P3O79m4r-PM

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Coming from the Cadence building 10 lobby (camera Sean)

Monday: Embargoed release

Tuesday: October Revolution

Wednesday: Simon Segars: It's the Security Stupid

Thursday: Social Engineering

Friday: Arm's Security...

Yes, it's true, the Cadence Academic Network is having its tenth anniversary. The program is run by Patrick Haspel, who is now based in San Jose. However, he is from Mannheim in Germany, and when it started, the academic network was purely a European...

In this week's Whiteboard Wednesday, Anne Hughes explains the considerations for designs targeted at automotive applications and the impact of functional safety requirements on that process.

https://youtu.be/wLMfGZk0u1I

This year's recipient of the Kaufman Award is Rob Rutenbar. He has a big connection to Cadence, since he was the founder of Neolinear, which we acquired in 2004. But there is a backstory of how Rob ended up in analog IC design in the first place. And...

https://youtu.be/2HhOBOftlv4

Coming from the roof of Cadence building 10 (camera Sean)

CDNLive Taiwan Automotive Panel

The Rise of the China IC Industry

Linley Gwennap on the Microprocessor Market

AMD's Early Experience with Portable Stimulus...

On today’s SOC designs, the memory control logics and memory arrays take up a lot of real estate in terms of area and as a part of the larger system since it mostly determines the performance of the application. Regardless of the processors and the interconnect, the memory system provides the instructions and operands and the application cannot be executed any faster than the memory system can handle. Due to this…

On October 24, Cadence and Arm announced early access to the Xcelium Parallel Logic Simulation on Arm-based servers. It was demonstrated running on Cavium ThunderX2 and Qualcomm Centriq servers at the Arm Techcon event on October 25 and 26.  This represents a new development in low power, yet high performance simulation solutions for the EDA industry.

Ensuring that designs function correctly is a huge challenge for the…

It's going to be academic week here on Breakfast Bytes. There is an anniversary coming up, the Kaufman award was announced recently, the Cadence Academic Network is having a birthday, and then there is the book that changed everything. So check in each...

At the latest meeting of the Decoding Formal Club, organized by Oski and sponsored by Cadence, the agenda promised three things:

• Lessons Learnt from a Deployment of Sign-Off Formal on a High-Performance Arm CPU, by Vikram Khosa, formal verification...

https://youtu.be/JQVYmENG0gw

Coming from the Cadence booth at Arm TechCon (camera Sean)

Academic Week

Monday: Andrew Kahng on The Last Scaling Levers

Tuesday: Rob Rutenbar is the Recipient of This Year's Kaufman Award

Wednesday: 10th Anniversary...

I think that Arm was successful in mobile (and subsequently in other markets) due to a couple of factors, mostly being in the right place at the time when two things happened, aka luck.

The first thing that happened was mobile phones took off, especially...

This week we return to the Internet of Things (IoT). My previous blogs on the subject – here and here – reviewed a presentation that Somshubhro Pal Choudhury, Partner of Bharat Innovation Ventures, gave at Cadence’s annual user conference, CDNLive...

As usual, Arm TechCon opened with a keynote by Mike Muller, Arm's CTO. His son is in mechanical design in some way and Mike told us he is applying for an internship. In a sign of the times, he is applying for an internship in Shenzhen. If you don't recognize...

Accelerating product time to market, achieving significantly higher productivity and efficiently working in global engineering teams are the key challenges being faced by designers. Team Design Authoring (TDA) feature of Allegro Design Entry HDL addresses these challenges by providing integrated team design environment. The design can be partitioned at a sheet or block level, and each designer can be assigned one or more…

In this week's Whiteboard Wednesdays video, the last of a three part series, Scott Jacobson ties together the technology implications of automotive electronics requirements and the effect they have on different memory model technologies.

www.youtube.com/watch

Paul Otellini was CEO of Intel from 2005-2013. He died in his sleep on October 2, aged 66. Apart from all the good things that happened on his watch, he is probably most famous for "missing mobile." In particular, when Apple and Jobs...

In the comments to blog #4, Frank Wiedmann asked about the correlation between the results of mismatch from Monte Carlo analysis and DC mismatch analysis. It is a fair question and here is a short blog to explore the topic. The example may not be realistic, but it is a useful for exploring the effects of mismatch on a circuit.  

Let’s start with a simple circuit—A resistively loaded differential amplifier with cascodes…

This morning Arm announced their Platform Security Architecture (PSA), a new way of protecting our ever expanding connected world. This is intended for all Arm-based devices from the lowest cost microcontrollers on up. There is a particular focus on...