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You can now leverage the 16.6-2015 release Allegro Rules Developer and Checker.

The Allegro Rules Developer and Checker allows you to develop custom fabrication and assembly rules to extend capabilities provided by Allegro PCB Designer and the Manufacturing Option. This tool provides a relational geometric verification language designed specifically for creating rules that are proprietary and custom to an original equipment…

For the same reason we "hang up" our phones.

When a layout designer saves a design, they often say "stream out" whereas in most software, such as Word or Powerpoint, this is usually simply called saving the file. As an aside, it is...

In this week's Whiteboard Wednesday's video, Arindam Guha explains how to quickly start DUT integration with Cadence's Verification IP (VIP).

https://youtu.be/rVvq8m9lCNU

In the past few days, there have been many posts on the Internet around Apple planning to remove the 3.5mm audio jack support from the upcoming iPhone 7 to create the slimmest iPhone in history. Given their multiple attempts in the past, it’s perfectly understandable, and for sure the existing Lightning connector is capable of providing this functionality.

From users’ perspective, however, it obviously raises a…

There are two major discontinuities in the last couple of process nodes—FinFETs and multiple patterning—which have changed a lot of the rules for custom design (which doesn't just mean analog, but also standard-cell design and other digital IP). The digital...

I have been taking a look at TSMC's 3D packaging technologies. From numerous presentations at OIP and the Technology Symposiums, I knew that they had two. CoWoS and InFO and I knew...well, that's about it, to be honest.

CoWoS (and CoWoS-XL, with...

It’s Thankgiving! Happy Thanksgiving if you are reading this on the day. Cadence is closed, of course. I’m working on blogs for next week (yeah, right). But I thought I’d put out a fun blog. This has nothing to do with EDA or the semiconductor ecosystem...

First things first. Voltus and Voltus-Fi are two separate products. They are both used for EMIR analysis, Voltus for digital design and Voltus-Fi for analog design (or custom transistor-level digital), or, in conjunction with with Voltus for mixed-signal...

Here is my report from the most recent IEEE 802.3 standards meeting, which was held in Dallas during the week of November 9.

The big news is that work on 50G Ethernet is now about to start. The 25G 802.3by project will soon be ending and plans are afoot for the team working on 802.3by to start thinking about 50G Ethernet.

The 802.3bs 400G project has adopted technology for 50G per lane operation. So it follows…

I sat down with Simon Segars, the CEO of ARM last Friday. As I said yesterday, it is ARM's 25th birthday this week, on Friday if you want the precise date. Although today, of course, we think of even the largest ARM processors as something to embed in...

This week is ARM's 25th anniversary. It is actually on Friday, the 27th, but since that is the Friday after Thanksgiving I figured publishing this blog on the precise day was probably less important than picking a day that people might actually see it...

How often has this happened to you?  You are re-using a part of a previous design in your new design, you are in the depths of coverage closure, both functional and design code coverage. You discover that many parts of the re-used design are actually not applicable in the new design, and you manually exclude those RTL lines of code. But wait – there is another design change, and your RTL now has been shifted around, the…

Marie Pistilli, who was injured in a car-crash in October (as I included in my first blog on my first day at Cadence). The crash left her largely paralyzed. She passed away on November 14th. Although she had retired, she was one of the driving forces...

When second generation cell-phone technology, GSM, was developed the biggest issue was keeping the computational load manageable for the semiconductor technology of the time. That was the most important resource to optimize. Now, in the LTE era, the efficiency...

At SEMICON West this year, I attended an interesting presentation by Steven Forrest of the University of Michigan on Moving Innovation from the Lab to the Marketplace. He said that one of the biggest problems is that universities all have offices of technology...

Wow! There is an extremely powerful option available for PCB designers in the 16.6 - 2015 Allegro PCB Editor release—the Allegro PCB Designer Manufacturing Option. This option is integrated into the Allegro PCB Editor.

As you’ll read in our “What’s New” section, “The Allegro PCB Designer Manufacturing Option is a comprehensive, powerful, easy-to-use suite of tools that makes it efficient for PCB…

Last week Cadence put out a press release that the Cadence implementation flow had been qualified on the GLOBALFOUNDRIES 22FDX process. At ARM TechCon last week, Joerg Winkler and Tamer Ragheb from the design enablement group of GLOBALFOUNDRIES in Dresden...

In this week's Whiteboard Wednesdays video, Chris Rowen discusses the basic principles of deep learning and how it enables the building of electronic systems that analyze massive amounts of data, recognize patterns, and extract relevant information from speech, images, and social network traffic.

https://youtu.be/9KLkndHw5Y8

Open source software is software where the source code is fairly freely available. I say "fairly" since there are almost always restrictions on its use to ensure that it continues to be open source and often that improvements made must contributed back...

If you put together your dream emulation system, it would have:

• Infinite throughput
• Scalability from small blocks to the largest SoC your company will work on
• Very low total cost of ownership (small physical size, consumes little power, cost amortizable...

How's that for a click-bait title? But it's true. Back in 1969, the British government created the Open University, or OU. This was a university intended to democratize university education by offering degrees mainly to people who already had a job and...

Ethernet was invented at the legendary Xerox PARC (Palo Alto Research Center) by Robert Metcalfe and David Boggs, based on earlier ideas from ALOHAnet developed at the University of Hawaii (memo to my boss: I think I need to make an onsite visit to check...

Mike Muller, ARM's CTO, delivered a little history and a lot of security. Oh, and he announced a new ARM processor and a new instruction set.

First, the history. In a couple of weeks' time is the 25th anniversary of the creation of ARM. I was there...