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Latest Blog Posts

  • Verification: Report On The MDV "Deep Dive" Workshops

    jvh3
    jvh3

    As heralded in a prior posts, we recently hosted some "alumni" from our recent Techtorials, and other area customers, in a "deep dive" workshop focused exclusively on Metric Driven Verification (MDV) here on the San Jose campus. One of the architects of our MDV flow, and the creator of this specific workshop, is my colleague John Nehls. I've asked John to comment on how the program unfolded, and speak about…

    • 22 Jan 2009
  • SoC and IP: DRAM Market Problems Escape All Solutions So Far

    Denali Blog
    Denali Blog
    DRAM Market Solution? You Won’t Find It Here!:
    If you are reading here, expecting to find a solution to the “DRAM Crisis” of red ink, low prices, huge product development costs and ‘next-generation’ process costs for fabs, to the slowing of DRAM demand, and arresting the more-than-a-year now DRAM supply excess...then stop here. I do not have the solution. There is no quick fix, and maybe there is no real fix at all…
    • 21 Jan 2009
  • System, PCB, & Package Design : What's Good About Updated Assembly Design Rules Checker? - Look to SPB16.2 and See!

    Jerry GenPart
    Jerry GenPart

    As packages continue to increase in complexity, particularly in the arrangement of multiple wirebond die components in stacked and side-by-side arrangements, there is a growing need for the ability to ensure that the final product meets manufacturing and assembly requirements.

    These checks may range from something as simple as the percentage of a bond wire’s length that is over the extents of the die, or may be as complex…

    • 21 Jan 2009
  • Verification: Exploring the Virtual Platform Part 2

    jasona
    jasona

    This week's installment of the "Exploring the Virtual Platform" series focuses on the Linux kernel that was booted in Part 1 of this series.

    In Part 1, when QEMU was invoked to boot Linux there was a -kernel argument:     -kernel zImage.integrator

    It's probably no secret this is the Linux kernel to run. It was directly downloaded from the QEMU download page. This was fine to show QEMU booting, but to do…

    • 21 Jan 2009
  • SoC and IP: SLC Price Premium and Profit Potential Persists

    Denali Blog
    Denali Blog
    SLC NAND is More Profitable than MLC, Though Market is Quite Limited:

    Digitimes reported this week that NAND contract prices were again rising, a little or a lot, in response to the supply takedowns of Oct-Dec, the idling of 200mm capacity, and a general, industry-wide production slowdown over the year-end holidays. Demand also appears to have been getting stronger, after the fall Shock Wave impact has worn off (we…
    • 20 Jan 2009
  • Verification: Tech Tip: Managing Specman esv File Size

    teamspecman
    teamspecman

    When compiling e files on top of Specman, or when using the save command, Specman stores its state in an .esv file.  However, there are times when the .esv file can become quite large -- sometimes on the order of 100s of MB.

    The good news is that Specman allows you to control the compression level of its .esv file and save valuable disk space by setting the config flag "esv_compression_level".  Values for compression…

    • 20 Jan 2009
  • Verification: Ride The Economy Slow-Down

    Ran Avinun
    Ran Avinun

    Last week, at Cadence Sales Kickoff, we have heard fascinating presentations from key US customer executives. The main points each one of the presenters made were:

    1. The economy is slowing down and as a result many of the semiconductor (and fabless) companies are facing major challenges.

    2. The successful semiconductor companies are the ones focusing on specific solution for their customers. This solution includes most of…

    • 19 Jan 2009
  • Verification: New AEware: Generate vr_ad Definitions for IP-XACT XML IP Blocks

    teamspecman
    teamspecman

    [Please welcome guest blogger Steve Hobbs, an Application Engineer in our Field Organization]

    Hands-up those of you who hate creating and maintaining your vr_ad register definitions!

    Pretty much all of you, I see...

    No surprise really, as register maps get bigger and bigger, and with highly configurable design IP, you end up having several versions on the boil at once, each with a similar but not identical…

    • 19 Jan 2009
  • Verification: VIP Following OVM Frees Users to Choose SystemVerilog and e

    Adam Sherer
    Adam Sherer

    Back in November Cadence introduced a vastly expanded verification IP portfolio using the OVM.  By using the OVM, Cadence chose a methodology architected for multiple verification languages.  Beyond the fact that Cadence has the broadest IEEE standard support in the industry, why would any other company use a methodology and verification IP for use with multiple languages?

    It turns out that each of the IEEE languages used…

    • 19 Jan 2009
  • Verification: Welcome to the "Exploring the Virtual Platform" Series

    jasona
    jasona

    Today I'm starting a series of articles related to what is commonly called the Virtual Platform or Virtual Prototype. There are probably many definitions of what it means, but I'm going to discuss the Virtual Platform as an abstract software model of a hardware system or subsystem created for the primary purpose of running embedded software and verifying the hardware/software interaction. A secondary purpose of the Virtual…

    • 16 Jan 2009
  • Verification: Aart DeGeus' Surprise Comment at Last Night's EDAC CEO Forum

    jvh3
    jvh3

    Last night the Electronic Design Automation Consortium ("EDAC", the trade group for the EDA industry) held its annual "CEO Forecast and Industry Vision" panel here in San Jose.  As with all prior EDAC events, I'm glad I went for both the networking (like seeing my old boss Larry Lapides of Imperas, and long time VA Partners like James Colgan, leader of the growing Xuropa EDA & electronics commun…

    • 15 Jan 2009
  • Verification: Generation Debugging With "IntelliGen" (With Video)

    teamspecman
    teamspecman

    You might have seen the Generation Debugger of Specman's new Generation Engine IntelliGen in presentations or blogs (like Corey's blog on the testcase utility).  Let's go a little bit beyond the pictures and high level descriptions and have a look at the details of this new debugger.

    First, a few words on the general concepts of Generation Debug:

    • We first need to collect generation debug information
      • This needs…
    • 14 Jan 2009
  • RF Engineering: MMSIM 7.1 Enhancements Benefit RF Designers!

    Tawna
    Tawna

    The 7.1 release of MMSIM is scheduled for mid-January. There are many exciting RF enhancements that will be useful for RF designers.

    1. Three new RF analyses using the harmonic balance engine, have been introduced to make the Spectre RF easier to use: 

    ...
    • 14 Jan 2009
  • System, PCB, & Package Design : What's Good About Differential Pair Support in Allegro PCB Editor? More Features in SPB16.2

    Jerry GenPart
    Jerry GenPart

    Some very helpful new features for Differential Pair support are available in in the SPB16.2 release.

    Differential Pair Regions

    A major enhancement made to Diff Pairs in the SPB16.2 release involves the use of Regions to define Diff Pair Line Width and Gap. Prior to 16.2, a change of line width/gap on the same layer was controlled with the Neck Width and Neck Gap parameters. Restrictions associated with the necking implementation…

    • 14 Jan 2009
  • Digital Design: Cool Way to Add Vias!

    Kari
    Kari

    I knew this functionality existed, but I hadn't really put it to use until yesterday. It saved me a lot of time, so I just had to share. Here's the situation I found myself in:

    LVS showed that I was missing vias to a small handful of my power-switch cells. Due to the structure of the cell, we had to make a modified copy of the LEF to get the exact via structures we wanted when we initially put in the power grid…

    • 14 Jan 2009
  • Verification: Predictions for 2009

    jvh3
    jvh3

    Having summarized the main verification technology-specific observations that the "Trailblazer" team saw in 2008, which to recap were:

    1 - 1 billion logic gate chip roadmaps are here
    2 - True "Metric Driven Verification" (MDV) starts to evolve from CDV
    3 - The "language war" is over -- all languages won!
    4 - Pre-silicon HW/SW co-verification became too important to ignore
    5 - Analog+Digital verification…

    • 13 Jan 2009
  • Verification: Functional Coverage for Embedded Software

    jasona
    jasona

    Hardware verification has evolved into keeping track of a pile of different types of coverage. There is line coverage, expression coverage, toggle coverage, assertion coverage, finite state machine coverage, and functional coverage. There are probably more types I'm forgetting related to low power or analog or something else.

    Software verification primarily utilizes code coverage. Tools like GNU gcov and others can…

    • 9 Jan 2009
  • RF Engineering: Tip of the Week: Guidelines for getting accurate HB QPSS/QPNoise results

    Tawna
    Tawna

    Two of the most important parameters for accuracy are:

    (1) maxharms

    (2) oversample


    maxharms:

    The accuracy of HB is greatly dependent on the number of harmonics chosen. As a general rule, you should simulate with with maxharms [5 3] and (if memory allows...

    • 9 Jan 2009
  • Verification: The New Generation Testcase Utility

    teamspecman
    teamspecman

    Specman's new Generation Engine, "IntelliGen", adopts an entirely new generation scheme compared to the previous engine, "Pgen".  It groups fields which are related via constraints into a Connected Field Set (CFS) and automatically determines the order in which all CFSs must be solved. All fields of the CFS are solved together (e.g. several fields can be reduced in one reduction step).  For…

    • 8 Jan 2009
  • RF Engineering: How to Simulate a Subcircuit (Netlist) With Spectre in ADE

    Tawna
    Tawna

    Many users ask, "How do I instantiate a netlist into my schematic and simulate with spectre in ADE?"

    To instantiate a subcircuit (netlist) in your schematic and simulate with spectre in ADE you need to create a cell with a CDF parameter 'model...

    • 7 Jan 2009
  • System, PCB, & Package Design : What's Good About The SPB16.2 PCB SI Release? Full Wave Field Solver!

    Jerry GenPart
    Jerry GenPart

    The SPB16.2 PCB SI release now contains the Electromagnetic Solution 2D Full Wave field solver (EMS2D).

    High density interconnect on PCB and packaging designs with signal switch rates over 5 Gpbs require model characterizations that can support frequency ranges from DC up to THz. Within this wide spectrum, electrical resonance, oscillation, signal dispersion and EM radiation are all likely and must be accounted for. Static…

    • 7 Jan 2009
  • Verification: A Look Back On 2008 (Before Hazarding Predictions for 2009)

    jvh3
    jvh3

    Before I dare take a stab at adding to the many predictions already made for 2009 (like those in EE Times and SCD Source), allow me to share with you some of the main verification technology-specific observations that the "Trailblazer" team saw in 2008:

    1 billion logic gate chip roadmaps
    As noted in a previous post, SoCs with over 1 billion logic gates are now on the drawing boards of customers around the wor…

    • 7 Jan 2009
  • Verification: The Eternal Debate: "Like" vs. "When" Inheritance

    teamspecman
    teamspecman

    First: Happy New Year, Specmaniacs!

    Much like the rivarly between the New York Yankees and the Boston Red Sox (or if you prefer, ManU vs. Chelsea, or the Tokyo Giants vs. Hanshin Tigers, or [insert a cricket example here]), Specmaniacs have been divided into two competing camps, with one group favoring "when inheritance", and the other "like inheritance".

    Before R&D and others from Team Specman elaborate…

    • 5 Jan 2009
  • Digital Design: Coming This Friday January 9th: Encounter Digital Implementation Office Hours

    BobD
    BobD

    Happy New Year everyone! I hope you all had a restful, enjoyable and healthy holiday season. I trust that you're all going through a mountain of E-mails this morning and trying to get back into the swing of working. If it helps, give yourself permission to merely get caught up on things and if you're able to solve even a single technical issue you'll earn extra credit in my book. :)

    As advetised by my colleague…

    • 5 Jan 2009
  • Verification: Power tool: The Reflection API

    teamspecman
    teamspecman

    One endless source of neat little tricks is the Reflection API built into Specman.  You can implement pretty much any utility you dream of with it, and quite intuitively.  Here is a case study:

    Have you ever agreed with your peers on the best coding conventions, and then saw the conventions decaying over time for lack of enforcement?  Specman/e's Reflection API lets you implement pretty much any sort of static checks on your…

    • 29 Dec 2008
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