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Breakfast Bytes

Featured

What Is Zonal Architecture? And Why Is it Upending the Automotive Supply Chain?

Earlier this week I wrote about the electric vehicle (EV) transition, how it is happening…

Paul McLellan
Paul McLellan 5 May 2023 • 7 min read
ota , Automotive , tier-1 , featured , zonal architecture

The Automotive Electric Vehicle Transition

The only really interesting part of the automotive industry is the electric vehicle…

Paul McLellan
Paul McLellan 1 May 2023 • 8 min read
Automotive , Electrification , featured , ev , nev

Richard Goering, 1952-2023

I have some sad news to report. Richard Goering passed away last month at the age…

Paul McLellan
Paul McLellan 27 Apr 2023 • 3 min read
featured , Richard Goering , EETimes
Breakfast Bytes

Latest blogs

Arm and NVIDIA: Simon Segars and Jensen Huang

What used to be face-to-face Arm TechCon has turned into a virtual conference under…

Paul McLellan 12 Oct 2020 • 8 min read
Simon Segars , NVIDIA , ARM , jensen huang

Sunday Brunch Video for 11th October 2020

https://youtu.be/0oRah8lCf4M Made in front of my TV Monday: Jasper User Group 2020…

Paul McLellan 11 Oct 2020 • less than a min read
sunday brunch

Optimized Digital Design, Implementation, and Signoff on TSMC N3

At the recent TSMC OIP forum, Yufeng Luo presented Optimized Digital Design, Implementation…

Paul McLellan 9 Oct 2020 • 4 min read
Genus , n3 , TSMC , Innovus , digital full flow

Bessemer Ventures: The Memos That Didn't Get Away

Who is the oldest venture capital company in the world? It is almost certainly Bessemer…

Paul McLellan 8 Oct 2020 • 3 min read
bessemer , anti-portfolio , bvp , bessemer venture partners , memoranda

TSMC OIP: Rent's Rule and Fast SerDes IP

Way back in the 1960s, E. Rent, who was working at IBM at the time, noticed a connection…

Paul McLellan 7 Oct 2020 • 5 min read
n5 , 16ff , 112g , n7 , SerDes , 56g

Innovus Mixed Placer

It has been a dream for a long time to have a fully automated mixed placer that does…

Paul McLellan 6 Oct 2020 • 5 min read

Jasper User Group 2020 Preview

The biggest gathering of formal verification engineers in the world takes place in…

Paul McLellan 5 Oct 2020 • 3 min read
Jasper User Group , JUG , cadenceconnect , JasperGold

Sunday Brunch Video for 4th October 2020

https://youtu.be/VZRwCBiexXQ Made in front of my TV Monday: The CHIPS Alliance …

Paul McLellan 4 Oct 2020 • less than a min read
sunday brunch

Breakfast Bytes Update: DATE, OpenROAD, Starlink

This is one of my occasional posts where I update some posts that I covered earlier…

Paul McLellan 2 Oct 2020 • 4 min read
openroad , update , starlink

Breakfast Bytes Update: Learning & Support, Undersea Datacenter

This is one of my occasional posts where I update some posts that I covered earlier…

Paul McLellan 1 Oct 2020 • 3 min read
microsoft , project natick , support app , Support , training , update

GTC 2020

Recently, GLOBALFOUNDRIES held this year's technology conference GTC. Of course,…

Paul McLellan 30 Sep 2020 • 5 min read
GTC , gtc 2020 , GlobalFoundries

NXP Glows in Tensilica HiFi

One trend that many people have remarked on, is that neural network inference is…

Paul McLellan 29 Sep 2020 • 2 min read
DSP , hifi 4 , NXP , HiFi , Tensilica , glow , neural network , nnlib

The CHIPS Alliance

On September 17, there was a meeting of the CHIPS Alliance. It was online, of course…

Paul McLellan 28 Sep 2020 • 4 min read
open source eda , open source hardware , open source , chips alliance

Sunday Brunch Video for 27th September 2020

https://youtu.be/EUDdGqdmTUU Made in "the Alps" Monday: Complete RF Solution: Think…

Paul McLellan 27 Sep 2020 • less than a min read
sunday brunch

CadenceLIVE Europe 2020 Preview

Normally, in May, I'd have been off to Unterschleißheim, a suburb of Munich where…

Paul McLellan 25 Sep 2020 • 3 min read
CadenceLive Europe , cadencelive

Should the Government Adopt Commercial Best Practice?

There is something called Betteridge's Law of Headlines that if a headline or title…

Paul McLellan 24 Sep 2020 • 4 min read
prototyping , Aerospace , Protium , Palladium , Emulation , commercial best practice , aviation week

The European Processor Initiative

At the recent RISC-V Global Forum, one of the presenters was Jean-Marc Denis, chairman…

Paul McLellan 23 Sep 2020 • 5 min read
risc-v , epi , ARM , european processor initiative

The First Decade of RISC-V: A Worldwide Phenomenon

A couple of weeks ago was the RISC-V Global Forum. Earlier in the week, I wrote about…

Paul McLellan 22 Sep 2020 • 6 min read
risc-v , patterson , dave patterson

Complete RF Solution: Think Outside the Chip

At the recent CadenceLIVE Americas, Cadence's Yuval Shay presented Think Outside…

Paul McLellan 21 Sep 2020 • 4 min read
5G , RF , Virtuoso RF , Virtuoso , radio

Understanding Machine Learning: A Model with One Weight

I wrote a post recently, HOT CHIPS: Scaling out Deep Learning Training , which I…

Paul McLellan 18 Sep 2020 • 2 min read
artificial intelligence , deep learning , neural networks , AI

Cadence Triple Gold at the Stevie Awards

Do you know what the Stevie Awards are? Officially, they are the International Business…

Paul McLellan 17 Sep 2020 • 2 min read
international business awards , stevie award , stevie , Clarity 3D Solver , clarity

RISC-V State of the Universe

A couple of weeks ago was the RISC-V Global Forum. This was truly global, in that…

Paul McLellan 16 Sep 2020 • 5 min read
risc-v , isa , patterson , asanovic

PSpice for TI

Texas Instruments (TI) is the biggest analog semiconductor company in the world.…

Paul McLellan 15 Sep 2020 • 3 min read
pspice-ti , analog , PSPICE , OrCAD , Texas Instruments , TI

What to Do About IP Developed Before ISO 26262?

If you have paid even passing attention to what has been going on in automotive functional…

Paul McLellan 14 Sep 2020 • 4 min read
asil ready , Automotive , functional safety , ASIL , ISO 26262 , fusa

Sunday Brunch Video for 13th September 2020

https://youtu.be/aqlmfd3g5G0 Made in "Jaipur, India" Monday: Labor Day Tuesday…

Paul McLellan 13 Sep 2020 • less than a min read
sunday brunch

Use Your Imagination to Get Smaller, Faster Chips

At the recent CadenceLIVE Americas, Nick Loebner of Imagination Technologies presented…

Paul McLellan 11 Sep 2020 • 3 min read
Genus , GPU , Imagination Technologies , Imagination , Innovus , digital full flow , ispatial

HOT CHIPS: The Space Race for the Biggest ML Machine

At the recent HOT CHIPS, the Sunday morning tutorial was on scale out of deep learning…

Paul McLellan 10 Sep 2020 • 5 min read
GPU , deep learning , tpu , NVIDIA , cerebras , wafer scale integration , google , training , mlperf

OIP Ecosystem Forum 2020

Last Tuesday was the virtual TSMC OIP Ecosystem Forum. Apart from being virtual,…

Paul McLellan 9 Sep 2020 • 3 min read
OIP , Automotive , n5 , oip ecosystem summit , ultra low power , n3 , TSMC , 16FFC , n7 , n6 , n12e , 3dfabric
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