• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Blogs
  2. Analog/Custom Design
  • Analog/Custom Design Blogs

    Never miss a story from Analog/Custom Design. Subscribe for in-depth analysis and articles.

    Subscribe by email
  • More
  • Cancel
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Featured

Virtuoso Studio IC25.1 ISR2 Now Available

Virtuoso Studio IC25.1 ISR2 production release is now available for download.

Virtuoso Release Team
Virtuoso Release Team 23 Oct 2025 • 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement

Spectre 25.1 Release Now Available

The SPECTRE 25.1 release is now available for download at Cadence Downloads. For…

SpectreReleaseTeam
SpectreReleaseTeam 5 Aug 2025 • 1 min read
featured , Spectre FMC Analysis , Spectre RF , Spectre Photonics , Spectre AMS Designer

Accelerating RFIC EM Analysis with EMX Planar 3D Solver in Virtuoso HI Platform

In modern IC design, especially with the rise of heterogeneous integration, electromagnetic…

Pratul Nijhawan
Pratul Nijhawan 3 Jun 2025 • 6 min read
blended , blended training , featured , Virtuoso Studio , Virtuoso System Design Environment
Analog/Custom Design

Latest blogs

Virtuoso Meets Maxwell: Virtuoso RF Solution - Revolution Begins with a Common Goal…

I am traveling home from the heart of the revolutionary Boston, Massachusetts, where…

michaelthompson 25 Jun 2019 • 4 min read
SiP , VRF , Spectre RF , Virtuoso Meets Maxwell , Virtuoso RF , Virtuoso , System Design Environment , RF design , Custom IC Design , Custom IC , Allegro

Virtuoso IC6.1.8 ISR4 and ICADVM18.1 ISR4 Now Available

The IC6.1.8 ISR4 and ICADVM18.1 ISR4 production releases are now available for download…

Virtuoso Release Team 17 Jun 2019 • 4 min read
ICADVM18.1 , ADE Explorer , Virtuoso Space-based Router , Interactive and Assisted Routing , Virtuoso RF , ADE , Virtuoso Analog Design Environment , Layout , Virtuoso , cadenceblogs , IC Release Blog , New in EDA , Custom IC Design , Virtuoso Layout Suite , Custom IC , IC6.1.8

Virtuosity: Device-Level Routing for Advanced Nodes - Using Finish Trunk

The first blog of the series talks about features that are not new but capabilities…

Parula 10 Jun 2019 • 4 min read
Trunk Trimming , Pin to Trunk , Create Wire , space-based router , Virtuoso Space-based Router , layout XL , Layout Suite , Trunk Extending , Layout L , Finish Trunk , EM Trunk Optimization , Custom IC Design

Virtuoso Video Diary: Can I Put Sticky Notes on Nets When Resolving EM Violations…

Do you know the Virtuoso Electrically Aware Design flow provides a sticky notes-kind…

NamrataM 7 Jun 2019 • 2 min read
ICADV12.3 , ICADVM18.1 , EM/IR , electrically-aware design flow , Layout EAD , Virtuoso Layout EXL , Virtuoso , IC6.1.7 , IC6.1.8 , Virtuoso Layout Suite XL

Spectre Tech Tips: Spectre APS Save Overview - Part 1

As an analog/mixed-signal designer, verification engineer, or CAD expert, you use…

Stefan Wuensche 29 May 2019 • 6 min read
save statement , spectre aps , nestlvl , pwr=subckt , save=selected , save=lvlpub , save=allpub , currents=all , subcktprobelvl , Spectre , currents=selected , pwr=devices , Spectre Waveform Writing , pwr=total , pwr=all , save option

Virtuoso Video Diary: Comparing Multiple Tests and Sharing Settings

Have you been in the situation where you want to change a particular simulation setting…

Yuan Li 21 May 2019 • 4 min read
Analog Design Environment , ICADVM18.1 , ADE , simulator options , Virtuoso Video Diary , Custom IC Design , IC6.1.8 , Assembler , ADE Assembler

Virtuoso Video Diary: The Next Big Thing — ADE Verifier Teams Up with Cadence vM…

Need to perform functional verification of a mixed-signal design? Using the connection…

Rashmi G 16 May 2019 • 3 min read
verifier , ICADVM18.1 , Functional Verification , Formalized Verification , vPlan , Mixed-Signal , Virtuoso Analog Design Environment , Virtuoso Video Diary , mixed-signal design , Custom IC Design , ADE Verifier , IC6.1.8 , vManager , verification

Virtuosity: Did My Checks Pass or Did They Not Run?

If you've ever tried to run the Checks/Asserts flow in Virtuoso ADE Assembler and…

AdityaMainkar 14 May 2019 • 2 min read
ADE Explorer , Virtuosity , Custom IC Design , ADE Assembler

Virtuosity: The Top 3 Post-Layout Enhancements in Analog Design Environment

Have you ever wanted to sweep DSPF files across corners, plot terminal current and…

Arja H 9 May 2019 • 4 min read
ADE Explorer , post-layout , DSPF , Virtuoso Analog Design Environment , postlayout , Virtuosity , ADE Assembler

Virtuoso Video Diary: What's New in Reliability Setup

Read this blog to know about the enhancements made to the reliability options form…

Udit Rajput 7 May 2019 • 3 min read
Stress Analysis , Analog Design Environment , relxpert , ICADVM18.1 , ADE Explorer , MMSIM , ADE XL , ADE , ISR3 , reliability options , Virtuoso Analog Design Environment , Spectre , ADE-XL , Virtuosity , Virtuoso Video Diary , aging , reliability analysis , Custom IC Design , IC6.1.8 , reliability , ADE Assembler

Virtuosity: Filtering Plots!

If you're a regular reader of the Virtuosity series, you'll have seen a few blogs…

Arja H 2 May 2019 • 2 min read
ADE Explorer , plotting , plot , Filtering , ViVA , Virtuosity , ADE Blog Series , Custom IC Design , ADE Assembler

Spectre Tech Tips: Measuring Noise in Digital Circuits

As a designer, verification engineer, or CAD expert, you use Spectre APS for analyzing…

RF Rich 30 Apr 2019 • 4 min read
edge delay , timeaverage , ADE Explorer , sampled jitter , sampled , pnoise , spectreRF , Virtuoso , direct plot form , full spectrum pnoise , edge phase noise , sampled phase , edge crossing

Virtuoso IC6.1.8 ISR3 and ICADVM18.1 ISR3 Now Available

The IC6.1.8 ISR3 and ICADVM18.1 ISR3 production releases are now available for download…

Virtuoso Release Team 30 Apr 2019 • 3 min read
ICADVM18.1 , ADE Explorer , Virtuoso Space-based Router , Interactive and Assisted Routing , Virtuoso RF , ADE , Virtuoso Analog Design Environment , Layout , Virtuoso , cadenceblogs , IC Release Blog , New in EDA , Custom IC Design , Virtuoso Layout Suite , Custom IC , IC6.1.8

Virtuosity: Cdsenv Editor – Simplifying Virtuoso Customization

Customization is the need of the day. From picking an ice cream flavor to outfitting…

Sucharita 26 Apr 2019 • 4 min read
Cdsenv Editor , Virtuoso Environment Variables , ICADVM18.1 , cdsenv , cdsenv variables , Virtuosity , Virtuoso Design Environment , Custom IC Design , IC6.1.8

Virtuosity: Spring-Cleaned Virtuoso Doc Closet

Most of us know how a spring-cleaned house can look like. But, do you know how the…

Rishu Misri Jaggi 19 Apr 2019 • 3 min read
legato , Virtuoso Schematic Editor , ICADVM18.1 , Routing , ADE L , Virtuoso RF , Layout EXL , layout XL , Virtuoso , Layout L , Cadence Help , Virtuoso Doc , Virtuoso Design Environment , Virtuoso Layout Suite , IC6.1.8

Virtuoso Video Diary: Creating and Previewing Stimuli

If you've ever tried to add stimuli to your design using the Stimuli form, you'll…

Arja H 11 Apr 2019 • 3 min read
ADE Explorer , stimuli form , stimuli , Virtuoso Analog Design Environment , ViVA , Virtuosity , ADE Blog Series , Custom IC Design , ADE Assembler , Stimuli Assignment form

Virtuoso Video Diary: Tune In to the MPT Video Channel

Tune In to the MPT Video Channel to check out a wide range of features easily accessible…

KomalJohar 9 Apr 2019 • 1 min read
ICADVM18.1 , video , Layout , Virtuoso , Virtuoso Video Diary , advanced nodes , multi-patterning technology , Custom IC

Virtuoso Video Diary: Checking EM Compliance Before Creating Layouts

How about checking your designs for electromigration (EM) compliance before creating…

NamrataM 4 Apr 2019 • 2 min read
EAD , electromigration , ICADVM18.1 , electrically-aware design flow , Virtuoso electrically-aware design flow , EM , Virtuoso Layout Suite , IC6.1.8

Spectre Tech Tips: Spectre Assert and Design Check Overview

As an analog/mixed-signal designer, verification engineer, or CAD expert, you use…

Stefan Wuensche 28 Mar 2019 • 5 min read
spectre aps , Circuit simulation , asserts , Spectre , SOA Checks , Design Checks

Virtuoso Video Diary: What Makes EM/IR Analysis A Significant Sign-Off Step?

This blog describes the EM and IR analyses in Virtuoso ADE as a design sign-off step…

Vani V 20 Mar 2019 • 3 min read
ADE Explorer , EM/IR , Power Integrity , IC layout , ADE , Virtuoso Analog Design Environment , Virtuoso Video Diary , sign-off , Custom IC Design , Custom IC , IC design , EMIR

Virtuoso IC6.1.8 ISR2 and ICADVM18.1 ISR2 Now Available

The IC6.1.8 ISR2 and ICADVM18.1 ISR2 production releases are now available for download…

Virtuoso Release Team 19 Mar 2019 • 3 min read
ICADVM18.1 , ADE Explorer , Virtuoso Space-based Router , ADE , Virtuoso Analog Design Environment , Layout , Virtuoso , cadenceblogs , IC Release Blog , New in EDA , Custom IC Design , Virtuoso Layout Suite , Custom IC , IC6.1.8

Virtuosity: Maestro Plotting Templates

Waveforms, plots, graphs, measurements, markers... are all a part and parcel of any…

Chandrika Durbha 18 Mar 2019 • 3 min read
ICADVM18.1 , ADE Explorer , ViVA , plotting templates , maestro plotting templates , Custom IC Design , IC6.1.8 , ADE Assembler

Virtuosity: Reading Vector Files in Virtuoso Visualization and Analysis

Prior to IC6.1.8 and ICADVM18.1, to view digital and analog waveforms along with…

Arja H 8 Mar 2019 • 2 min read
VCD , Analog Design Environment , ICADVM18.1 , analog , ViVA , Virtuosity , analog stimuli , IC6.1.8 , vector

Virtuosity: Identifying Those Traces

With the ever-increasing number of simulations required to be run these days, the…

AdityaMainkar 6 Mar 2019 • 3 min read
Explorer , plotting , ADE XL , Virtuoso , Analog Design Environment , ViVA , ADE-XL , Virtuosity , Assembler

Spectre Tech Tips: Device Aging? Yes, even Silicon wears out

While most of us would like our electronic gadgets to last forever, the reality is…

Moustafa Moham 28 Feb 2019 • 3 min read
Stress Analysis , TDDB , PBTI , native reliability analysis , Spectre , reliability analysis , HCI , NBTI , reliability

Virtuosity: New Flexible Subwindows

Plots in Cadence Virtuoso Visualization and Analysis can be plotted in a window or…

Arja H 26 Feb 2019 • 3 min read
ICADVM18.1 , subwindows , waveforms , Virtuoso Analog Design Environment , ViVA , Virtuosity , plotting templates , Custom IC Design , IC6.1.8

Verifying Power Intent in Analog and Mixed-Signal Designs Using Formal Methods

Analog and Mixed-signal (AMS) designs are increasingly using active power management…

msteam 21 Feb 2019 • 2 min read
AMS , Virtuoso Schematic Editor , Low Power , virtuoso power manager , Virtuoso-AMS , mixed signal design , mixed signal solution , Virtuoso , low-power design , mixed signal , mixed-signal verification

Virtuosity: A Smart Extracted View

The Cadence Quantus Smart View is the next generation of the Extracted View in the…

Arja H 21 Feb 2019 • 4 min read
Smart View , PAD , ICADVM18.1 , ADE Explorer , Virtuoso , Virtuosity , Quantus , IC6.1.8 , parasitics , ADE Assembler , Virtuoso Layout Suite XL
<>
Blog - Title

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information