Custom IC Design

Latest Posts

Discussion

Layout toolbox will not start with new techfile

Category: Custom IC Design

By slbecker

$usertype
•
updated over 12 years ago by Quek

3 replies • 15601 views
Discussion

Changes to option form do not take effect immediately - Virtuoso

Category: Custom IC Design

By mikewu216

$usertype
•
updated over 12 years ago by Andrew Beckett

1 replies • 1159 views
Discussion

Parameterizing a Parameterized symbol

Category: Custom IC Design

By RFStuff

$usertype
•
updated over 12 years ago by Andrew Beckett

1 replies • 14978 views
Discussion

Error while doing Calibre PEX

Category: Custom IC Design

By narendra046

$usertype
•
updated over 12 years ago by Andrew Beckett

1 replies • 21091 views
Discussion

Stream out to ascii dump file supported in Virtuoso 6.1.5?

Category: Custom IC Design

By layoutBoy

$usertype
•
updated over 12 years ago by layoutBoy

2 replies • 15369 views
Discussion

import a GDS file into virtuoso

Category: Custom IC Design

By Graphene1

$usertype
•
updated over 12 years ago by Andrew Beckett

19 replies • 46088 views
Discussion

Plotting device parameters from a PSS simulation

Category: Custom IC Design

By Desgn

$usertype
•
updated over 12 years ago by Andrew Beckett

1 replies • 14515 views
Discussion

Netlist procedure

Category: Custom IC Design

By pdda

$usertype
•
updated over 12 years ago by Andrew Beckett

1 replies • 17090 views
Discussion

[Spectre] Multiple spectre instances compiling Ahdl behavioral components

Category: Custom IC Design

By fgarcia

$usertype
•
updated over 12 years ago by Frank Wiedmann

4 replies • 16099 views
Discussion

Random DC voltage source generation

Category: Custom IC Design

By Tanvir100

$usertype
•
updated over 12 years ago by Frank Wiedmann

3 replies • 18471 views
Discussion

Accessing C code generated from veriloga compile

Category: Custom IC Design

By RobinCommander

$usertype
•
updated over 12 years ago by Andrew Beckett

1 replies • 14209 views
Discussion

LVS Problem running Fedora 19

Category: Custom IC Design

By ziikzak

$usertype
•
updated over 12 years ago by Andrew Beckett

14 replies • 19175 views
Discussion

How to prevent from ocean to print unwanted messages on screen

Category: Custom IC Design

By Geser

$usertype
•
updated over 12 years ago by Andrew Beckett

5 replies • 16301 views
Discussion

How to use the "derived layers" to check spacing between two layers in DRD ?

Category: Custom IC Design

By marbs

$usertype
•
updated over 12 years ago by Andrew Beckett

4 replies • 1726 views
Discussion

How to disable log message in terminal window

Category: Custom IC Design

By TFTandOLED1

$usertype
•
updated over 12 years ago by TFTandOLED1

2 replies • 16065 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.