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Custom IC Design

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  • Discussion

    vias and nets from spaced base router

    Category: Custom IC Design

    By Brouns Robin

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    started over 14 years ago

    0 replies • 13318 views
  • Discussion

    Generate Schematic from Verilog Netlist - undefined function ipcBeginProcess

    Category: Custom IC Design

    By gwong

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    updated over 14 years ago by gwong

    2 replies • 2021 views
  • Discussion

    cadence spectre delay problem

    Category: Custom IC Design

    By jimito13

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    updated over 14 years ago by jimito13

    7 replies • 16434 views
  • Discussion

    cadence awd.exe autoloading even after logout

    Category: Custom IC Design

    By VenuA

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    updated over 14 years ago by VenuA

    2 replies • 13787 views
  • Discussion

    setup Distibuted processing in ADE L

    Category: Custom IC Design

    By edafans

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    updated over 14 years ago by Andrew Beckett

    3 replies • 16446 views
  • Discussion

    cdd or cddbo

    Category: Custom IC Design

    By Malolo

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    updated over 14 years ago by Andrew Beckett

    3 replies • 16456 views
  • Discussion

    SKILL pCell automated testing

    Category: Custom IC Design

    By tashah

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    updated over 14 years ago by Andrew Beckett

    2 replies • 14040 views
  • Discussion

    ADEXL - psf cross reference file?

    Category: Custom IC Design

    By BradW

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    updated over 14 years ago by Andrew Beckett

    1 replies • 889 views
  • Discussion

    How to add drain/source area & perimeter "ad as pd ps" of MOSFET in creating Spectre netlist in Analog Design Environment?

    Category: Custom IC Design

    By Paulux

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    updated over 14 years ago by Andrew Beckett

    3 replies • 5538 views
  • Discussion

    .csv output in Spectre

    Category: Custom IC Design

    By dmckenney

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    updated over 14 years ago by Andrew Beckett

    3 replies • 16036 views
  • Discussion

    feedback

    Category: Custom IC Design

    By sam andro

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    updated over 14 years ago by sam andro

    6 replies • 14855 views
  • Discussion

    Delete objects within a ring

    Category: Custom IC Design

    By sagnea

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    •

    updated over 14 years ago by skillUser

    1 replies • 13682 views
  • Discussion

    Cannot run Virtuoso in 64-bit mode

    Category: Custom IC Design

    By ucar

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    •

    updated over 14 years ago by Andrew Beckett

    5 replies • 18052 views
  • Discussion

    *Error* Unable to establish connection with WaveScan

    Category: Custom IC Design

    By Sirisha

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    •

    updated over 14 years ago by Sirisha

    2 replies • 14818 views
  • Discussion

    nlambda must be defined or declared ERROR in ADEXL

    Category: Custom IC Design

    By Mohamadgw

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    •

    updated over 14 years ago by Andrew Beckett

    3 replies • 15392 views
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