Custom IC Design

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Discussion

IC25.1 Virtuoso crash but the simulation is still on going

Category: Custom IC Design

By sjwprcssw

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started 19 days ago

0 replies • 246 views
Discussion

How do you draw a parametrized layout of an inverter ?

Category: Custom IC Design

By MC20250412421

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started 20 days ago

0 replies • 243 views
Discussion

Is there any way to prevent my definition for model library from being overwritten by libInit.il of PDK while virtuoso starts up correctly?

Category: Custom IC Design

By zuiying

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updated 20 days ago by zuiying

2 replies • 451 views
Discussion

metal (or any dummy fill layer) skill code that can run at the block or chip level and automatically fill dummy metal in vacant spaces.

Category: Custom IC Design

By yogeshjaiswalCAD

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updated 20 days ago by Andrew Beckett

9 replies • 1257 views
Discussion

How to define a parameter representing a path in globel model files?

Category: Custom IC Design

By zuiying

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updated 22 days ago by Andrew Beckett

1 replies • 321 views
Discussion

Cannot generate the EMIR report using 'emirreport'

Category: Custom IC Design

By aalbason

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updated 25 days ago by Saloni Chhabra

3 replies • 681 views
Discussion

EMIR Pin Current Results Discrepancy vs Transient Simulation Results

Category: Custom IC Design

By aalbason

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started 25 days ago

0 replies • 297 views
Discussion

Re: netlisting of verilogA block with choices for prompt in CDF

Category: Custom IC Design

By SL202411208815

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started 25 days ago

0 replies • 269 views
Discussion

ic25.1 lib manager doesn't show last modification date

Category: Custom IC Design

By sjwprcssw

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started 27 days ago

0 replies • 378 views
Discussion

Cadence virtuso aging simulation

Category: Custom IC Design

By PB202509293935

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updated 27 days ago by PB202509293935

4 replies • 1488 views
Discussion

How to rerun just one test of a simulation with 2 test and variable dependency

Category: Custom IC Design

By Pedrocasty

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updated 27 days ago by Yagya Mishra

3 replies • 1539 views
Discussion

Creating GaN Device Symbol (EPC2001C) from Spectre Model File in Virtuoso

Category: Custom IC Design

By AT202509281158

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updated 27 days ago by Yagya Mishra

1 replies • 917 views
Discussion

using output from one point sweep to another

Category: Custom IC Design

By RA202502215244

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updated 27 days ago by Yagya Mishra

1 replies • 1280 views
Discussion

Virtuoso PEX "Nothing in Layout" Issue

Category: Custom IC Design

By AR202509099018

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updated 28 days ago by Andrew Beckett

3 replies • 1058 views
Discussion

Issue with Deselecting Labels Having "Text Drawing" Layers in Layout

Category: Custom IC Design

By AR202509246930

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updated 28 days ago by AR202509246930

4 replies • 1206 views

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