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Custom IC Design

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  • Discussion

    how to define actime_pair = yes

    Category: Custom IC Design

    By sjwprcker sjwprcker

    •

    updated over 4 years ago by Andrew Beckett

    3 replies • 11735 views
  • Discussion

    Import Netlist to Schematic with existing Cells in other Libraries

    Category: Custom IC Design

    By FormerMember FormerMember

    •

    updated over 4 years ago by Andrew Beckett

    5 replies • 13138 views
  • Discussion

    sampling a digital bus

    Category: Custom IC Design

    By maaz2020 maaz2020

    •

    updated over 4 years ago by maaz2020

    4 replies • 12722 views
  • Discussion

    Probing All Currents in ADE Explorer / XL Without Inserting Components or Manual Selection

    Category: Custom IC Design

    By life life

    •

    updated over 4 years ago by Andrew Beckett

    4 replies • 13476 views
  • Discussion

    Stability analysis with hbstb

    Category: Custom IC Design

    By BakBeh BakBeh

    •

    updated over 4 years ago by BakBeh

    5 replies • 13623 views
  • Discussion

    Problem in doing pss pnoise simulation to get PFD CP output current noise

    Category: Custom IC Design

    By macanfeng11 macanfeng11

    •

    updated over 4 years ago by Andrew Beckett

    6 replies • 15165 views
  • Discussion

    How to mark a floating bus net as noConn in Schematic Composer in IC5141

    Category: Custom IC Design

    By RFStuff RFStuff

    •

    updated over 4 years ago by Andrew Beckett

    6 replies • 20802 views
  • Discussion

    Techgen Error: Starting Triangle not defined

    Category: Custom IC Design

    By CasV CasV

    •

    updated over 4 years ago by CasV

    4 replies • 12175 views
  • Discussion

    The Principle of Automatic Sweeping

    Category: Custom IC Design

    By Matsuge Matsuge

    •

    updated over 4 years ago by Matsuge

    4 replies • 14012 views
  • Discussion

    Convergence issue with Verilog-A model

    Category: Custom IC Design

    By AQoutb AQoutb

    •

    updated over 4 years ago by Andrew Beckett

    4 replies • 15483 views
  • Discussion

    Variable set in corners overrides variable locally defined in test

    Category: Custom IC Design

    By SteveDobbs SteveDobbs

    •

    updated over 4 years ago by Andrew Beckett

    4 replies • 12644 views
  • Discussion

    Virtuoso schematic set net to default to a certain color

    Category: Custom IC Design

    By CSCNalu CSCNalu

    •

    updated over 4 years ago by Andrew Beckett

    3 replies • 13683 views
  • Discussion

    Analysis was skipped due to inability to compute operating point.

    Category: Custom IC Design

    By AQoutb AQoutb

    •

    updated over 4 years ago by Andrew Beckett

    3 replies • 16503 views
  • Discussion

    trouble with auto routing minimum spanning tree, Layout XL

    Category: Custom IC Design

    By helloIamAndrea helloIamAndrea

    •

    started over 4 years ago

    0 replies • 11185 views
  • Discussion

    Problem in simulating an inverter using BSIMCMG

    Category: Custom IC Design

    By Engto Engto

    •

    updated over 4 years ago by Andrew Beckett

    1 replies • 11429 views
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