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Custom IC Design

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  • Discussion

    cdsServIpc - ERROR (cmms-1889): Unknown switch '-c'

    Category: Custom IC Design

    By Karzo

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    updated over 10 years ago by Andrew Beckett

    1 replies • 2628 views
  • Discussion

    Problem with importing verilog to Cadence virtuoso

    Category: Custom IC Design

    By aamn

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    updated over 10 years ago by Andrew Beckett

    2 replies • 14838 views
  • Discussion

    Can I use a "not synthesized verilog file" in Cadence Virtuoso?

    Category: Custom IC Design

    By aamn

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    updated over 10 years ago by Andrew Beckett

    1 replies • 1064 views
  • Discussion

    How to perform a DOE (Design of Experiment) in Cadence?

    Category: Custom IC Design

    By Pyroblast

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    updated over 10 years ago by Andrew Beckett

    2 replies • 13586 views
  • Discussion

    Virtuoso AnalogEnvironment : netlisting without ocean

    Category: Custom IC Design

    By samung

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    •

    updated over 10 years ago by Andrew Beckett

    1 replies • 13000 views
  • Discussion

    Monte-Carlo simulation finish anormally

    Category: Custom IC Design

    By UUinfini

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    updated over 10 years ago by Andrew Beckett

    1 replies • 12912 views
  • Discussion

    Batch run of ADE simulations using skill

    Category: Custom IC Design

    By pshan

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    started over 10 years ago

    0 replies • 13530 views
  • Discussion

    Reliability study: Spectre vs Relxpert

    Category: Custom IC Design

    By Gurunath Kadam

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    updated over 10 years ago by Gurunath Kadam

    1 replies • 14462 views
  • Discussion

    Layout XL: "Connectivity->Update->Components and Nets" resets all my pins

    Category: Custom IC Design

    By PNadeau

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    updated over 10 years ago by PNadeau

    7 replies • 9065 views
  • Discussion

    Ultrasim: individual accuracy setting on subcircuit level ?

    Category: Custom IC Design

    By baenischfau

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    updated over 10 years ago by PNadeau

    6 replies • 16716 views
  • Discussion

    Changing config view within a single ADEXL test

    Category: Custom IC Design

    By Ivars

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    updated over 10 years ago by Tom Volden

    4 replies • 18439 views
  • Discussion

    Instantiating Spectre/Spice module inside Systemverilog testbench for irun based flow

    Category: Custom IC Design

    By rrpat

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    updated over 10 years ago by rrpat

    1 replies • 1534 views
  • Discussion

    Design of Inductor in CMOS - Help needed

    Category: Custom IC Design

    By Pyroblast

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    •

    updated over 10 years ago by Andrew Beckett

    3 replies • 1935 views
  • Discussion

    making via come as double via by default

    Category: Custom IC Design

    By imaneet

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    •

    updated over 10 years ago by imaneet

    3 replies • 14230 views
  • Discussion

    Hierarchy Editor - How to use library list

    Category: Custom IC Design

    By Atul Dubey

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    •

    updated over 10 years ago by Andrew Beckett

    6 replies • 9113 views
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