Custom IC Design

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Discussion

sampling a digital bus

Category: Custom IC Design

By maaz2020
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updated over 4 years ago by maaz2020

4 replies • 12716 views
Discussion

Probing All Currents in ADE Explorer / XL Without Inserting Components or Manual Selection

Category: Custom IC Design

By life
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updated over 4 years ago by Andrew Beckett

4 replies • 13471 views
Discussion

Stability analysis with hbstb

Category: Custom IC Design

By BakBeh
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updated over 4 years ago by BakBeh

5 replies • 13617 views
Discussion

Problem in doing pss pnoise simulation to get PFD CP output current noise

Category: Custom IC Design

By macanfeng11
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updated over 4 years ago by Andrew Beckett

6 replies • 15160 views
Discussion

How to mark a floating bus net as noConn in Schematic Composer in IC5141

Category: Custom IC Design

By RFStuff
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updated over 4 years ago by Andrew Beckett

6 replies • 20798 views
Discussion

Techgen Error: Starting Triangle not defined

Category: Custom IC Design

By CasV
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updated over 4 years ago by CasV

4 replies • 12171 views
Discussion

The Principle of Automatic Sweeping

Category: Custom IC Design

By Matsuge
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updated over 4 years ago by Matsuge

4 replies • 14005 views
Discussion

Convergence issue with Verilog-A model

Category: Custom IC Design

By AQoutb
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updated over 4 years ago by Andrew Beckett

4 replies • 15478 views
Discussion

Variable set in corners overrides variable locally defined in test

Category: Custom IC Design

By SteveDobbs
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updated over 4 years ago by Andrew Beckett

4 replies • 12640 views
Discussion

Virtuoso schematic set net to default to a certain color

Category: Custom IC Design

By CSCNalu
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updated over 4 years ago by Andrew Beckett

3 replies • 13677 views
Discussion

Analysis was skipped due to inability to compute operating point.

Category: Custom IC Design

By AQoutb
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updated over 4 years ago by Andrew Beckett

3 replies • 16499 views
Discussion

trouble with auto routing minimum spanning tree, Layout XL

Category: Custom IC Design

By helloIamAndrea
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started over 4 years ago

0 replies • 11182 views
Discussion

Problem in simulating an inverter using BSIMCMG

Category: Custom IC Design

By Engto
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updated over 4 years ago by Andrew Beckett

1 replies • 11425 views
Discussion

How to ignore FILL cells from Encounter in LVS Assura?

Category: Custom IC Design

By Kabal
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updated over 4 years ago by RobMan

6 replies • 17761 views
Discussion

ERROR EMX in virtuoso

Category: Custom IC Design

By tawsaras
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updated over 4 years ago by Andrew Beckett

6 replies • 15529 views

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